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Re: [PATCH] x86 peephole2s to optimize "1LL << x"


On Sat, Sep 11, 2004 at 12:04:44PM -0600, Roger Sayle wrote:
> + (define_peephole2
> +   [(set (match_operand:SI 0 "register_operand" "")
> + 	(const_int 1))
> +    (parallel [(set (match_operand:SI 1 "register_operand" "")
> + 		   (const_int 0))
> + 	      (clobber (reg:CC FLAGS_REG))])
> +    (parallel [(set (match_dup 1)
> + 		   (ior:SI (ashift:SI (match_dup 1)
> + 			      (match_operand:QI 2 "nonmemory_operand" ""))
> + 			   (lshiftrt:SI (match_dup 0)
> + 			      (minus:QI (const_int 32) (match_dup 2)))))
> + 	      (clobber (reg:CC FLAGS_REG))])]
> +   ""
> +   [(set (match_dup 0) (const_int 1))
> +    (parallel [(set (match_dup 1) (const_int 0))
> + 	      (clobber (reg:CC FLAGS_REG))])])

Huh?!??!  Where, pray tell, did the actual shift go?  You can't
eliminate it entirely.



r~


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