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[committed] mips.md macroisation (23/n)
- From: Richard Sandiford <rsandifo at redhat dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Sun, 29 Aug 2004 13:07:35 +0100
- Subject: [committed] mips.md macroisation (23/n)
Part 23 of the mips.md macroisation process. This patch handles the
floating-point conditional-move instructions. There should be no
behavioural changes.
Bootstrapped & regression tested on mips-sgi-irix6.5. Applied to head.
Richard
* config/mips/mips.md (*mov[sd]f_on_*): Redefine using :SCALARF.
(mov[sd]fcc): Likewise.
Index: config/mips/mips.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.md,v
retrieving revision 1.295
diff -c -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.295 mips.md
*** config/mips/mips.md 29 Aug 2004 11:58:32 -0000 1.295
--- config/mips/mips.md 29 Aug 2004 12:02:50 -0000
*************** (define_insn "*mov<GPR:mode>_on_<MOVECC:
*** 5548,5582 ****
[(set_attr "type" "condmove")
(set_attr "mode" "<GPR:MODE>")])
! (define_insn "*movsf_on_<MOVECC:mode>"
! [(set (match_operand:SF 0 "register_operand" "=f,f")
! (if_then_else:SF
(match_operator:MOVECC 4 "equality_operator"
[(match_operand:MOVECC 1 "register_operand" "<MOVECC:reg>,<MOVECC:reg>")
(const_int 0)])
! (match_operand:SF 2 "register_operand" "f,0")
! (match_operand:SF 3 "register_operand" "0,f")))]
! "ISA_HAS_CONDMOVE && TARGET_HARD_FLOAT"
! "@
! mov%T4.s\t%0,%2,%1
! mov%t4.s\t%0,%3,%1"
! [(set_attr "type" "condmove")
! (set_attr "mode" "SF")])
!
! (define_insn "*movdf_on_<MOVECC:mode>"
! [(set (match_operand:DF 0 "register_operand" "=f,f")
! (if_then_else:DF
! (match_operator:MOVECC 4 "equality_operator"
! [(match_operand:MOVECC 1 "register_operand" "<MOVECC:reg>,<MOVECC:reg>")
! (const_int 0)])
! (match_operand:DF 2 "register_operand" "f,0")
! (match_operand:DF 3 "register_operand" "0,f")))]
! "ISA_HAS_CONDMOVE && TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT"
"@
! mov%T4.d\t%0,%2,%1
! mov%t4.d\t%0,%3,%1"
[(set_attr "type" "condmove")
! (set_attr "mode" "DF")])
;; These are the main define_expand's used to make conditional moves.
--- 5548,5567 ----
[(set_attr "type" "condmove")
(set_attr "mode" "<GPR:MODE>")])
! (define_insn "*mov<SCALARF:mode>_on_<MOVECC:mode>"
! [(set (match_operand:SCALARF 0 "register_operand" "=f,f")
! (if_then_else:SCALARF
(match_operator:MOVECC 4 "equality_operator"
[(match_operand:MOVECC 1 "register_operand" "<MOVECC:reg>,<MOVECC:reg>")
(const_int 0)])
! (match_operand:SCALARF 2 "register_operand" "f,0")
! (match_operand:SCALARF 3 "register_operand" "0,f")))]
! "ISA_HAS_CONDMOVE"
"@
! mov%T4.<fmt>\t%0,%2,%1
! mov%t4.<fmt>\t%0,%3,%1"
[(set_attr "type" "condmove")
! (set_attr "mode" "<SCALARF:MODE>")])
;; These are the main define_expand's used to make conditional moves.
*************** (define_expand "mov<mode>cc"
*** 5592,5616 ****
DONE;
})
! (define_expand "movsfcc"
! [(set (match_dup 4) (match_operand 1 "comparison_operator"))
! (set (match_operand:SF 0 "register_operand")
! (if_then_else:SF (match_dup 5)
! (match_operand:SF 2 "register_operand")
! (match_operand:SF 3 "register_operand")))]
! "ISA_HAS_CONDMOVE && TARGET_HARD_FLOAT"
! {
! gen_conditional_move (operands);
! DONE;
! })
!
! (define_expand "movdfcc"
[(set (match_dup 4) (match_operand 1 "comparison_operator"))
! (set (match_operand:DF 0 "register_operand")
! (if_then_else:DF (match_dup 5)
! (match_operand:DF 2 "register_operand")
! (match_operand:DF 3 "register_operand")))]
! "ISA_HAS_CONDMOVE && TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT"
{
gen_conditional_move (operands);
DONE;
--- 5577,5589 ----
DONE;
})
! (define_expand "mov<mode>cc"
[(set (match_dup 4) (match_operand 1 "comparison_operator"))
! (set (match_operand:SCALARF 0 "register_operand")
! (if_then_else:SCALARF (match_dup 5)
! (match_operand:SCALARF 2 "register_operand")
! (match_operand:SCALARF 3 "register_operand")))]
! "ISA_HAS_CONDMOVE"
{
gen_conditional_move (operands);
DONE;