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Re: PATCH [mainline] Fix for long double (TARGET_LONG_DOUBLE_128) on ppc-darwin



On Jul 30, 2004, at 2:17 PM, Geoffrey Keating wrote:


Fariborz Jahanian <fjahanian@apple.com> writes:

7e.com)

I think the second part of this patch won't work. If you get into rs6000_split_multireg_move with a non-offsettable address, there's no code you can generate. I'll look into this a bit more and come up with a patch.


Second part was added after change in the first part. In the following test case:


static long long foo()
{
  static long long rat;
  return rat;
}

Following pattern is now being generated:

(insn 9 8 10 (set:SI (reg:SI 121)
(plus:SI (reg:SI 31 r31)
(high:SI (const:SI (minus:SI (symbol_ref:SI ("!D__*rat.0") [flags 0x2] <var_decl 0x41757380 rat>)
(symbol_ref:SI ("<pic base>"))))))) -1 (nil)
(nil))


(insn 10 9 11 (set:SI (reg/f:SI 120)
(lo_sum:SI (reg:SI 121)
(const:SI (minus:SI (symbol_ref:SI ("!D__*rat.0") [flags 0x2] <var_decl 0x41757380 rat>)
(symbol_ref:SI ("<pic base>")))))) -1 (nil)
(expr_list:REG_EQUAL (symbol_ref:SI ("!D__*rat.0") [flags 0x2] <var_decl 0x41757380 rat>)
(nil)))


And following code is generated which looks correct to me and works in test case (and bootstrap of gcc):

       addis r2,r10,ha16(rat.0-"L00000000001$pb")
        la r2,lo16(rat.0-"L00000000001$pb")(r2)
        lfd f0,0(r2)

...


- Fariborz


ChangeLog:

2004-07-24 Fariborz Jahanian <fjahanian@apple.com>
        * config/rs6000/rs6000.c (legitimate_lo_sum_address_p):
        DImode is legit.  mode with lo_sum pic address and when
        long double is 128 bits.
        (rs6000_split_multireg_move): Added case of LO_SUM when
        register node is being obtained.

Patch:

Index: rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.671
diff -c -p -r1.671 rs6000.c
*** rs6000.c 23 Jul 2004 04:35:17 -0000 1.671
--- rs6000.c 24 Jul 2004 18:32:19 -0000
*************** legitimate_lo_sum_address_p (enum machin
*** 3162,3168 ****
        if (GET_MODE_NUNITS (mode) != 1)
        return false;
        if (GET_MODE_BITSIZE (mode) > 32
!  && !(TARGET_HARD_FLOAT && TARGET_FPRS && mode == DFmode))
        return false;

        return CONSTANT_P (x);
--- 3162,3170 ----
        if (GET_MODE_NUNITS (mode) != 1)
        return false;
        if (GET_MODE_BITSIZE (mode) > 32
!  && !(TARGET_HARD_FLOAT && TARGET_FPRS
!  && (mode == DFmode ||
!  (TARGET_LONG_DOUBLE_128 && mode == DImode))))
        return false;

        return CONSTANT_P (x);
*************** rs6000_split_multireg_move (rtx dst, rtx
*** 11077,11084 ****
             we have change that register last.  */

          breg = (GET_CODE (XEXP (src, 0)) == PLUS
                  ? XEXP (XEXP (src, 0), 0)
!  : XEXP (src, 0));

          if (!REG_P (breg))
              abort();
--- 11079,11087 ----
             we have change that register last.  */

          breg = (GET_CODE (XEXP (src, 0)) == PLUS
+ || GET_CODE (XEXP (src, 0)) == LO_SUM)
                  ? XEXP (XEXP (src, 0), 0)
!  : XEXP (src, 0);

          if (!REG_P (breg))
              abort();


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