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[PATCH] Peephole x86 multiplications by 3, 5 and 9 (take 2)
- From: Roger Sayle <roger at eyesopen dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Richard Henderson <rth at redhat dot com>
- Date: Fri, 30 Jul 2004 10:20:59 -0600 (MDT)
- Subject: [PATCH] Peephole x86 multiplications by 3, 5 and 9 (take 2)
The following patch implements RTH's suggested improvements to my
original patch to peephole integer multiplications by 3, 5 and 9
into the equivalent "lea" instruction in the i386 backend. The
original patch is reduced to two peepholes that check for operands
of 3, 5 or 9 themselves, but I also add two additional peepholes
to take advantage of the leaq instruction on 64-bit targets.
I managed to get intermittent access to an Athlon64 box for the very
first time, long enough to discover that these peephole patterns need
to be placed earlier in the file to compete with the k8 optimization
that splits integer multiplications by immediate constants to avoid
vector decode issues. Unfortunately, the system I was on was a bit
flakey, so this patch is not fully tested on x86_64 [Does it normally
take over eight hours to run the testsuite on x86_64 or is this a
recent regression problem?]
However, on i686-pc-linux-gnu, I've both bootstrapped and regression
tested the following on mainline, and a very similar variant against
the gcc-3_4-branch. This optimization is far easier to trigger on a
pre-tree-ssa GCC, such as gcc 3.4.1, where I confirmed that the following
testcase is being optimized as expected.
int mul5(int x)
{
int y = 5;
return x*y;
}
Ok for mainline?
2004-07-30 Roger Sayle <roger@eyesopen.com>
Richard Henderson <rth@redhat.com>
* config/i386/i386.md: New peephole2's to convert imul by 3, 5 or
9 into the equivalent lea instruction.
Index: config/i386/i386.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.551
diff -c -3 -p -r1.551 i386.md
*** config/i386/i386.md 17 Jul 2004 13:36:40 -0000 1.551
--- config/i386/i386.md 29 Jul 2004 17:56:27 -0000
***************
*** 19326,19331 ****
--- 19326,19394 ----
(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int 8)))])]
"")
+ ;; Convert imul by three, five and nine into lea
+ (define_peephole2
+ [(parallel
+ [(set (match_operand:SI 0 "register_operand" "")
+ (mult:SI (match_operand:SI 1 "register_operand" "")
+ (match_operand:SI 2 "const_int_operand" "")))
+ (clobber (reg:CC FLAGS_REG))])]
+ "INTVAL (operands[2]) == 3
+ || INTVAL (operands[2]) == 5
+ || INTVAL (operands[2]) == 9"
+ [(set (match_dup 0)
+ (plus:SI (mult:SI (match_dup 1) (match_dup 2))
+ (match_dup 1)))]
+ { operands[2] = GEN_INT (INTVAL (operands[2]) - 1); })
+
+ (define_peephole2
+ [(parallel
+ [(set (match_operand:SI 0 "register_operand" "")
+ (mult:SI (match_operand:SI 1 "nonimmediate_operand" "")
+ (match_operand:SI 2 "const_int_operand" "")))
+ (clobber (reg:CC FLAGS_REG))])]
+ "!optimize_size
+ && (INTVAL (operands[2]) == 3
+ || INTVAL (operands[2]) == 5
+ || INTVAL (operands[2]) == 9)"
+ [(set (match_dup 0) (match_dup 1))
+ (set (match_dup 0)
+ (plus:SI (mult:SI (match_dup 0) (match_dup 2))
+ (match_dup 0)))]
+ { operands[2] = GEN_INT (INTVAL (operands[2]) - 1); })
+
+ (define_peephole2
+ [(parallel
+ [(set (match_operand:DI 0 "register_operand" "")
+ (mult:DI (match_operand:DI 1 "register_operand" "")
+ (match_operand:DI 2 "const_int_operand" "")))
+ (clobber (reg:CC FLAGS_REG))])]
+ "TARGET_64BIT
+ && (INTVAL (operands[2]) == 3
+ || INTVAL (operands[2]) == 5
+ || INTVAL (operands[2]) == 9)"
+ [(set (match_dup 0)
+ (plus:DI (mult:DI (match_dup 1) (match_dup 2))
+ (match_dup 1)))]
+ { operands[2] = GEN_INT (INTVAL (operands[2]) - 1); })
+
+ (define_peephole2
+ [(parallel
+ [(set (match_operand:DI 0 "register_operand" "")
+ (mult:DI (match_operand:DI 1 "nonimmediate_operand" "")
+ (match_operand:DI 2 "const_int_operand" "")))
+ (clobber (reg:CC FLAGS_REG))])]
+ "TARGET_64BIT
+ && !optimize_size
+ && (INTVAL (operands[2]) == 3
+ || INTVAL (operands[2]) == 5
+ || INTVAL (operands[2]) == 9)"
+ [(set (match_dup 0) (match_dup 1))
+ (set (match_dup 0)
+ (plus:DI (mult:DI (match_dup 0) (match_dup 2))
+ (match_dup 0)))]
+ { operands[2] = GEN_INT (INTVAL (operands[2]) - 1); })
+
;; Imul $32bit_imm, mem, reg is vector decoded, while
;; imul $32bit_imm, reg, reg is direct decoded.
(define_peephole2
Roger
--
Roger Sayle, E-mail: roger@eyesopen.com
OpenEye Scientific Software, WWW: http://www.eyesopen.com/
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