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[PATCH] Don't set x86_prefetch_sse based on -mtune= option (followup)
On Thu, Jul 08, 2004 at 11:47:10AM +0200, Paolo Bonzini wrote:
> >If it is just VIA C3 which SIGILLs on them, we could perhaps set
> >x86_prefetch_sse = true if tune CPU has PTA_PREFETCH_SSE and
> >TARGET_CMOVE.
> >So -march=i386 -mtune=pentium4 would not generate prefetches but
> >-march=i686 -mtune=pentium4 would. The latter can't run on pre-cmov/sse
> >VIAs.
>
> Like this? This ends up enabling SSE prefetches when tuning for any
> processor that does have them (Athlon, K8, Pentium 4, Nocona), as long
> as the -march points to a Pentium Pro (ok) or a CPU with SSE prefetches.
Something like that, though I think it is better to move that check into the
loop. Otherwise there is risk somebody reuses i for something else in
between.
> It also updates i386-pf-sse.c accordingly (it is failing now).
Sorry about that. Though, the right fix is IMHO different, see below.
Ok to commit?
2004-07-08 Paolo Bonzini <bonzini@gnu.org>
Jakub Jelinek <jakub@redhat.com>
* config/i386/i386.c (override_options): Enable
SSE prefetches with -mtune, as long as we are
compiling for i686 or higher. All i686 processors
accept SSE prefetches as NOPS, some i586's don't.
2004-07-08 Jakub Jelinek <jakub@redhat.com>
* gcc.mist-tests/i386-prefetch.exp (PREFETCH_SSE): Change all
-march=i386 into -march=i686. Add -march=i686 -mtune=x and
-march=x for pentium3, pentium3m, pentium-m, pentium4m,
prescott and c3-2.
(PREFETCH_3DNOW): Add -march=c3.
--- gcc/config/i386/i386.c.jj 2004-07-08 12:18:01.000000000 +0200
+++ gcc/config/i386/i386.c 2004-07-08 12:20:03.019534891 +0200
@@ -1306,6 +1306,14 @@ override_options (void)
ix86_tune = processor_alias_table[i].processor;
if (TARGET_64BIT && !(processor_alias_table[i].flags & PTA_64BIT))
error ("CPU you selected does not support x86-64 instruction set");
+
+ /* Intel CPUs have always interpreted SSE prefetch instructions as
+ NOPs; so, we can enable SSE prefetch instructions even when
+ -mtune (rather than -march) points us to a processor that has them.
+ However, the VIA C3 gives a SIGILL, so we only do that for i686 and
+ higher processors. */
+ if (TARGET_CMOVE && (processor_alias_table[i].flags & PTA_PREFETCH_SSE))
+ x86_prefetch_sse = true;
break;
}
if (i == pta_size)
--- gcc/testsuite/gcc.misc-tests/i386-prefetch.exp.jj 2004-07-08 12:18:02.719791777 +0200
+++ gcc/testsuite/gcc.misc-tests/i386-prefetch.exp 2004-07-08 12:18:49.716487247 +0200
@@ -1,4 +1,4 @@
-# Copyright (C) 2002 Free Software Foundation, Inc.
+# Copyright (C) 2002, 2004 Free Software Foundation, Inc.
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@@ -46,16 +46,27 @@ set PREFETCH_NONE [list \
# instructions as nops.
set PREFETCH_SSE [list \
- { -march=i386 -mtune=pentium3 } \
- { -march=i386 -mtune=pentium4 } \
- { -march=i386 -mtune=athlon } \
- { -march=i386 -mtune=athlon-4 } \
+ { -march=i686 -mtune=pentium3 } \
+ { -march=i686 -mtune=pentium3m } \
+ { -march=i686 -mtune=pentium-m } \
+ { -march=i686 -mtune=pentium4 } \
+ { -march=i686 -mtune=pentium4m } \
+ { -march=i686 -mtune=prescott } \
+ { -march=i686 -mtune=athlon } \
+ { -march=i686 -mtune=athlon-4 } \
+ { -march=i686 -mtune=c3-2 } \
{ -march=pentium3 } \
- { -march=pentium4 } ]
+ { -march=pentium3m } \
+ { -march=pentium-m } \
+ { -march=pentium4 } \
+ { -march=pentium4m } \
+ { -march=prescott } \
+ { -march=c3-2 } ]
# Generate 3DNow! prefetch instructions for the following.
set PREFETCH_3DNOW [list \
+ { -march=c3 } \
{ -march=k6-2 } \
{ -march=k6-3 } ]
Jakub