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[PATCH] improve float to double on PPC a little
- From: Andrew Pinski <pinskia at physics dot uc dot edu>
- To: "gcc-patches at gcc dot gnu dot org Patches" <gcc-patches at gcc dot gnu dot org>
- Cc: Andrew Pinski <pinskia at physics dot uc dot edu>
- Date: Thu, 27 May 2004 20:01:03 -0400
- Subject: [PATCH] improve float to double on PPC a little
Since on rs6000, the floating point registers are always in double
precision,
the need for conversion is not needed at all. This improves the
conversion by
make the cost for the case where the registers are different.
OK? Bootstrapped on powerpc-apple-darwin with no regressions.
Thanks,
Andrew Pinski
ChangeLog:
* config/rs6000/rs6000.md (extendsfdf2): Add the
constraint is that the two registers can be the same.
Also increase the cost of how the expensive if the two
registers are different.
Patch:
Index: rs6000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.190.2.46
diff -u -p -r1.190.2.46 rs6000.md
--- rs6000.md 12 May 2004 13:34:32 -0000 1.190.2.46
+++ rs6000.md 27 May 2004 23:51:29 -0000
@@ -4373,8 +4373,8 @@
;; is not guaranteed. Perhaps this should be tightened up at some
point.
(define_insn "extendsfdf2"
- [(set (match_operand:DF 0 "gpc_reg_operand" "=f")
- (float_extend:DF (match_operand:SF 1 "gpc_reg_operand" "f")))]
+ [(set (match_operand:DF 0 "gpc_reg_operand" "=f,!f")
+ (float_extend:DF (match_operand:SF 1 "gpc_reg_operand" "0,f")))]
"TARGET_HARD_FLOAT && TARGET_FPRS"
"*
{
@@ -4383,7 +4383,8 @@
else
return \"fmr %0,%1\";
}"
- [(set_attr "type" "fp")])
+ [(set_attr "type" "*,fp")
+ (set_attr "length" "0,4")])
(define_insn "truncdfsf2"
[(set (match_operand:SF 0 "gpc_reg_operand" "=f")