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[arm] Fix arm-mmx-1.c
- From: Paul Brook <paul at codesourcery dot com>
- To: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Cc: Richard Earnshaw <Richard dot Earnshaw at arm dot com>
- Date: Thu, 13 May 2004 01:36:35 +0100
- Subject: [arm] Fix arm-mmx-1.c
- Organization: CodeSourcery
The test gcc.dg/arm-mmx-1.c assumes the loop in the testcase will use/clobber
all available registers. With tree-ssa the number of registers clobbered
seems to be sensitive to the optimizations applied, resulting in spurious
failures.
The patch below changes the test to use an explicit asm clobber.
Tested with cross to arm-none-elf.
Ok?
Paul
2004-05-13 Paul Brook <paul@codesourcery.com>
* gcc.dg/arm-mmx-1.c: Use asm to clobber registers.
Index: gcc.dg/arm-mmx-1.c
===================================================================
RCS file: /var/cvsroot/gcc-cvs/gcc/gcc/testsuite/gcc.dg/arm-mmx-1.c,v
retrieving revision 1.3
diff -u -p -r1.3 arm-mmx-1.c
--- a/gcc.dg/arm-mmx-1.c 1 Apr 2004 00:56:55 -0000 1.3
+++ b/gcc.dg/arm-mmx-1.c 13 May 2004 00:27:45 -0000
@@ -5,22 +5,15 @@
/* { dg-final { global compiler_flags; if ![string match "*-mthumb *"
$compiler_flags] { scan-assembler "ldmfd\[ ]sp!.*ip,\[ ]*pc" } } } */
/* This function uses all the call-saved registers, namely r4, r5, r6,
- r7, r8, r9, sl, fp. Since we also save pc, that leaves an odd
+ r7, r8, r9, sl, fp. Since we also save lr, that leaves an odd
number of registers, and the compiler will push ip to align the
stack. Make sure that we restore ip into ip, not into sp as is
done when using a frame pointer. The -mno-apcs-frame option
permits the frame pointer to be used as an ordinary register. */
-int
-foo(int *a, int *b, int *c, int *d, int *tot)
-{
- int i, j, k, l, m, n, o;
- *tot = 0;
- for (i = *a; i < *b; i += *c)
- for (j = *a; j < *b; j += *d)
- for (k = *a; k < *c; k += *d)
- for (l = *b; k < *c; k += *d)
- for (m = *d; k < *c; k += *b)
- *tot += i + j + k + l + m;
- return *tot;
+void
+foo(void)
+{
+ __asm volatile ("" : : :
+ "r4", "r5", "r6", "r7", "r8", "r9", "sl", "fp", "lr");
}