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fix altivec one_cmplv* patterns
- From: Aldy Hernandez <aldyh at redhat dot com>
- To: gcc-patches at gcc dot gnu dot org, OLGA at il dot ibm dot com
- Date: Mon, 10 May 2004 23:29:28 -0400
- Subject: fix altivec one_cmplv* patterns
Hi Dorit.
You're patch of:
http://gcc.gnu.org/ml/gcc-patches/2004-03/msg02072.html
...breaks altivec on ppc because gas doesn't have support for the
simplified mnemonic vnot. Interestingly enough, my specs didn't have
vnot either.
Since none of the ppc linux distros have vnot, let's use the real
opcode-- vnor-- instead. When someone adds vnot support to binutils
and it has properly propagated to the distros, we could change this
back.
This patch fixes a handful of simd regressions on
powerpc-unknown-linux-gnualtivec.
Committed to mainline.
* config/rs6000/altivec.md ("one_cmplv16qi2"): Change vnot to
vnor.
("one_cmplv8hi2"): Same.
("one_cmplv4si2"): Same.
Index: config/rs6000/altivec.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/altivec.md,v
retrieving revision 1.18
diff -c -p -r1.18 altivec.md
*** config/rs6000/altivec.md 30 Mar 2004 08:25:30 -0000 1.18
--- config/rs6000/altivec.md 11 May 2004 03:21:07 -0000
***************
*** 999,1019 ****
[(set (match_operand:V16QI 0 "register_operand" "=v")
(not:V16QI (match_operand:V16QI 1 "register_operand" "v")))]
"TARGET_ALTIVEC"
! "vnot %0,%1"
[(set_attr "type" "vecsimple")])
(define_insn "one_cmplv8hi2"
[(set (match_operand:V8HI 0 "register_operand" "=v")
(not:V8HI (match_operand:V8HI 1 "register_operand" "v")))]
"TARGET_ALTIVEC"
! "vnot %0,%1"
[(set_attr "type" "vecsimple")])
(define_insn "one_cmplv4si2"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(not:V4SI (match_operand:V4SI 1 "register_operand" "v")))]
"TARGET_ALTIVEC"
! "vnot %0,%1"
[(set_attr "type" "vecsimple")])
(define_insn "iorv16qi3"
--- 999,1019 ----
[(set (match_operand:V16QI 0 "register_operand" "=v")
(not:V16QI (match_operand:V16QI 1 "register_operand" "v")))]
"TARGET_ALTIVEC"
! "vnor %0,%1,%1"
[(set_attr "type" "vecsimple")])
(define_insn "one_cmplv8hi2"
[(set (match_operand:V8HI 0 "register_operand" "=v")
(not:V8HI (match_operand:V8HI 1 "register_operand" "v")))]
"TARGET_ALTIVEC"
! "vnor %0,%1,%1"
[(set_attr "type" "vecsimple")])
(define_insn "one_cmplv4si2"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(not:V4SI (match_operand:V4SI 1 "register_operand" "v")))]
"TARGET_ALTIVEC"
! "vnor %0,%1,%1"
[(set_attr "type" "vecsimple")])
(define_insn "iorv16qi3"