This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
[patch] gcc: Fix comment typos.
- From: Kazu Hirata <kazu at cs dot umass dot edu>
- To: gcc-patches at gcc dot gnu dot org
- Date: Fri, 30 Apr 2004 12:27:45 -0400 (EDT)
- Subject: [patch] gcc: Fix comment typos.
Hi,
Committed as obvious.
Kazu Hirata
2004-04-30 Kazu Hirata <kazu@cs.umass.edu>
* bb-reorder.c, c-opts.c, cfglayout.c, cgraph.c, cgraphunit.c,
cppfiles.c, fold-const.c, ggc-zone.c, loop-doloop.c, optabs.c,
reg-stack.c, varasm.c, config/alpha/ev4.md,
config/alpha/ev5.md, config/alpha/ev6.md, config/arm/arm.c,
config/c4x/c4x.c, config/c4x/c4x.md, config/cris/cris.c,
config/cris/cris.h, config/fr30/fr30.h, config/frv/frv.c,
config/frv/frv.h, config/frv/frv.md, config/h8300/h8300.c,
config/i386/i386.c, config/i386/i386.md, config/i386/winnt.c,
config/ia64/itanium2.md, config/ip2k/ip2k.c,
config/mips/mips.c, config/mips/mips.h, config/mips/sr71k.md,
config/pa/pa.c, config/s390/s390.c, config/sh/sh.c: Fix
comment typos.
Index: bb-reorder.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/bb-reorder.c,v
retrieving revision 1.71
diff -u -r1.71 bb-reorder.c
--- bb-reorder.c 19 Apr 2004 13:03:06 -0000 1.71
+++ bb-reorder.c 30 Apr 2004 16:07:15 -0000
@@ -901,7 +901,7 @@
last_trace = -1;
/* If we are partitioning hot/cold basic blocks, mark the cold
- traces as already connnected, to remove them from consideration
+ traces as already connected, to remove them from consideration
for connection to the hot traces. After the hot traces have all
been connected (determined by "unconnected_hot_trace_count"), we
will go back and connect the cold traces. */
Index: c-opts.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/c-opts.c,v
retrieving revision 1.110
diff -u -r1.110 c-opts.c
--- c-opts.c 14 Apr 2004 06:07:27 -0000 1.110
+++ c-opts.c 30 Apr 2004 16:07:16 -0000
@@ -101,7 +101,7 @@
/* Number of deferred options scanned for -include. */
static size_t include_cursor;
-/* Permit Fotran front-end options. */
+/* Permit Fortran front-end options. */
static bool permit_fortran_options;
static void set_Wimplicit (int);
Index: cfglayout.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/cfglayout.c,v
retrieving revision 1.56
diff -u -r1.56 cfglayout.c
--- cfglayout.c 9 Apr 2004 19:57:39 -0000 1.56
+++ cfglayout.c 30 Apr 2004 16:07:16 -0000
@@ -1172,7 +1172,7 @@
memset (bb->rbi, 0, sizeof (struct reorder_block_def));
}
-/* Main entry point to this module - initialize the datastructures for
+/* Main entry point to this module - initialize the data structures for
CFG layout changes. It keeps LOOPS up-to-date if not null. */
void
Index: cgraph.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/cgraph.c,v
retrieving revision 1.47
diff -u -r1.47 cgraph.c
--- cgraph.c 29 Apr 2004 15:39:12 -0000 1.47
+++ cgraph.c 30 Apr 2004 16:07:17 -0000
@@ -50,9 +50,9 @@
Intraprocedural information:
Callgraph is place to store data needed for intraprocedural optimization.
- All datastructures are divided into three components: local_info that
+ All data structures are divided into three components: local_info that
is produced while analyzing the function, global_info that is result
- of global walkking of the callgraph on the end of compilation and
+ of global walking of the callgraph on the end of compilation and
rtl_info used by RTL backend to propagate data from already compiled
functions to their callers.
@@ -60,11 +60,11 @@
The function inlining information is decided in advance and maintained
in the callgraph as so called inline plan.
- For each inlined call, the calle's node is clonned to represent the
+ For each inlined call, the callee's node is cloned to represent the
new function copy produced by inlininer.
- Each inlined call gets unque corresponding clone node of the callee
- and the datastructure is updated while inlining is performed, so
- the clones are elliminated and their callee edges redirected to the
+ Each inlined call gets a unique corresponding clone node of the callee
+ and the data structure is updated while inlining is performed, so
+ the clones are eliminated and their callee edges redirected to the
caller.
Each edge has "inline_failed" field. When the field is set to NULL,
@@ -100,7 +100,7 @@
static GTY((param_is (struct cgraph_node))) htab_t cgraph_hash;
/* We destructively update callgraph during inlining and thus we need to
- keep information on whether inlining happend separately. */
+ keep information on whether inlining happened separately. */
htab_t cgraph_inline_hash;
/* The linked list of cgraph nodes. */
@@ -152,7 +152,7 @@
(tree) p2);
}
-/* Allocate new callgraph node and insert it into basic datastructures. */
+/* Allocate new callgraph node and insert it into basic data structures. */
static struct cgraph_node *
cgraph_create_node (void)
{
Index: cgraphunit.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/cgraphunit.c,v
retrieving revision 1.57
diff -u -r1.57 cgraphunit.c
--- cgraphunit.c 29 Apr 2004 15:39:12 -0000 1.57
+++ cgraphunit.c 30 Apr 2004 16:07:17 -0000
@@ -36,7 +36,7 @@
- cgraph_varpool_finalize_variable
- This function has same behaviour as the above but is used for static
+ This function has same behavior as the above but is used for static
variables.
- cgraph_finalize_compilation_unit
@@ -324,7 +324,7 @@
if (node->output)
abort ();
- /* Reset our datastructures so we can analyze the function again. */
+ /* Reset our data structures so we can analyze the function again. */
memset (&node->local, 0, sizeof (node->local));
memset (&node->global, 0, sizeof (node->global));
memset (&node->rtl, 0, sizeof (node->rtl));
@@ -1022,7 +1022,7 @@
{
struct cgraph_node *n;
- /* We may elliminate the need for out-of-line copy to be output. In that
+ /* We may eliminate the need for out-of-line copy to be output. In that
case just go ahead and re-use it. */
if (!e->callee->callers->next_caller
&& (!e->callee->needed || DECL_EXTERNAL (e->callee->decl))
@@ -1348,7 +1348,7 @@
}
/* Decide on the inlining. We do so in the topological order to avoid
- expenses on updating datastructures. */
+ expenses on updating data structures. */
static void
cgraph_decide_inlining (void)
@@ -1491,7 +1491,7 @@
}
/* Decide on the inlining. We do so in the topological order to avoid
- expenses on updating datastructures. */
+ expenses on updating data structures. */
static void
cgraph_decide_inlining_incrementally (struct cgraph_node *node)
@@ -1561,7 +1561,7 @@
if (order_pos != cgraph_n_nodes)
abort ();
- /* Garbage collector may remove inline clones we elliminate during
+ /* Garbage collector may remove inline clones we eliminate during
optimization. So we must be sure to not reference them. */
for (i = 0; i < order_pos; i++)
if (order[i]->output)
Index: cppfiles.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/cppfiles.c,v
retrieving revision 1.206
diff -u -r1.206 cppfiles.c
--- cppfiles.c 23 Apr 2004 02:22:24 -0000 1.206
+++ cppfiles.c 30 Apr 2004 16:07:18 -0000
@@ -382,7 +382,7 @@
/* Given a filename FNAME search for such a file in the include path
starting from START_DIR. If FNAME is the empty string it is
- interpreted as STDIN if START_DIR is PFILE->no_seach_path.
+ interpreted as STDIN if START_DIR is PFILE->no_search_path.
If the file is not found in the file cache fall back to the O/S and
add the result to our cache.
@@ -1342,7 +1342,7 @@
return b->prev;
}
-/* This datastructure holds the list of header files that were seen
+/* This data structure holds the list of header files that were seen
while the PCH was being built. The 'entries' field is kept sorted
in memcmp() order; yes, this means that on little-endian systems,
it's sorted initially by the least-significant byte of 'size', but
Index: fold-const.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/fold-const.c,v
retrieving revision 1.371
diff -u -r1.371 fold-const.c
--- fold-const.c 29 Apr 2004 15:39:12 -0000 1.371
+++ fold-const.c 30 Apr 2004 16:07:22 -0000
@@ -8875,7 +8875,7 @@
{
tree type = TREE_TYPE (t);
- /* Doing something usefull for floating point would need more work. */
+ /* Doing something useful for floating point would need more work. */
if (!INTEGRAL_TYPE_P (type) && !POINTER_TYPE_P (type))
return false;
Index: ggc-zone.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/ggc-zone.c,v
retrieving revision 2.14
diff -u -r2.14 ggc-zone.c
--- ggc-zone.c 4 Mar 2004 04:25:12 -0000 2.14
+++ ggc-zone.c 30 Apr 2004 16:07:23 -0000
@@ -1293,7 +1293,7 @@
size_t written;
};
-/* Initialize the PCH datastructure. */
+/* Initialize the PCH data structure. */
struct ggc_pch_data *
init_ggc_pch (void)
Index: loop-doloop.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/loop-doloop.c,v
retrieving revision 2.2
diff -u -r2.2 loop-doloop.c
--- loop-doloop.c 20 Mar 2004 02:31:57 -0000 2.2
+++ loop-doloop.c 30 Apr 2004 16:07:23 -0000
@@ -129,7 +129,7 @@
return condition;
/* ??? If a machine uses a funny comparison, we could return a
- canonicalised form here. */
+ canonicalized form here. */
return 0;
}
Index: optabs.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/optabs.c,v
retrieving revision 1.217
diff -u -r1.217 optabs.c
--- optabs.c 20 Apr 2004 19:40:26 -0000 1.217
+++ optabs.c 30 Apr 2004 16:07:26 -0000
@@ -1089,7 +1089,7 @@
/* If TARGET is the same as one of the operands, the REG_EQUAL note
won't be accurate, so use a new target. Do this also if target is not
a REG, first because having a register instead may open optimization
- oportunities, and second because if target and op0 happen to be MEMs
+ opportunities, and second because if target and op0 happen to be MEMs
designating the same location, we would risk clobbering it too early
in the code sequence we generate below. */
if (target == 0 || target == op0 || target == op1 || ! REG_P (target))
Index: reg-stack.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/reg-stack.c,v
retrieving revision 1.150
diff -u -r1.150 reg-stack.c
--- reg-stack.c 30 Apr 2004 05:31:48 -0000 1.150
+++ reg-stack.c 30 Apr 2004 16:07:28 -0000
@@ -3045,7 +3045,7 @@
/* ??? Future: process inner loops first, and give them arbitrary
initial stacks which emit_swap_insn can modify. This ought to
- prevent double fxch that aften appears at the head of a loop. */
+ prevent double fxch that often appears at the head of a loop. */
/* Process all blocks reachable from all entry points. */
for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
Index: varasm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/varasm.c,v
retrieving revision 1.422
diff -u -r1.422 varasm.c
--- varasm.c 19 Apr 2004 13:52:16 -0000 1.422
+++ varasm.c 30 Apr 2004 16:07:30 -0000
@@ -236,7 +236,7 @@
current_function_name ());
unlikely_section_label_printed = true;
- /* Make sure that we have approprate alignment for instructions
+ /* Make sure that we have appropriate alignment for instructions
in this section. */
assemble_align (FUNCTION_BOUNDARY);
}
Index: config/alpha/ev4.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/alpha/ev4.md,v
retrieving revision 1.3
diff -u -r1.3 ev4.md
--- config/alpha/ev4.md 27 Sep 2003 04:48:12 -0000 1.3
+++ config/alpha/ev4.md 30 Apr 2004 16:07:31 -0000
@@ -98,7 +98,7 @@
"ev4_ist"
"store_data_bypass_p")
-; Multiplies use a non-piplined imul unit. Also, "no [ebox] insn can
+; Multiplies use a non-pipelined imul unit. Also, "no [ebox] insn can
; be issued exactly three cycles before an integer multiply completes".
(define_insn_reservation "ev4_imulsi" 21
Index: config/alpha/ev5.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/alpha/ev5.md,v
retrieving revision 1.4
diff -u -r1.4 ev5.md
--- config/alpha/ev5.md 27 Sep 2003 04:48:12 -0000 1.4
+++ config/alpha/ev5.md 30 Apr 2004 16:07:31 -0000
@@ -18,7 +18,7 @@
;; the Free Software Foundation, 59 Temple Place - Suite 330,
;; Boston, MA 02111-1307, USA.
-;; EV5 has two asymetric integer units, E0 and E1, plus separate
+;; EV5 has two asymmetric integer units, E0 and E1, plus separate
;; FP add and multiply units.
(define_automaton "ev5_0,ev5_1")
@@ -97,7 +97,7 @@
; Conditional move and branch can issue the same cycle as the test.
(define_bypass 0 "ev5_ilogcmp" "ev5_ibr,ev5_cmov" "if_test_bypass_p")
-; Multiplies use a non-piplined imul unit. Also, "no insn can be issued
+; Multiplies use a non-pipelined imul unit. Also, "no insn can be issued
; to E0 exactly two cycles before an integer multiply completes".
(define_insn_reservation "ev5_imull" 8
@@ -136,7 +136,7 @@
(define_bypass 13 "ev5_imulq" "ev5_imull,ev5_imulq,ev5_imulh")
(define_bypass 15 "ev5_imulh" "ev5_imull,ev5_imulq,ev5_imulh")
-; Similarly for the FPU we have two asymetric units.
+; Similarly for the FPU we have two asymmetric units.
(define_insn_reservation "ev5_fadd" 4
(and (eq_attr "cpu" "ev5")
Index: config/alpha/ev6.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/alpha/ev6.md,v
retrieving revision 1.3
diff -u -r1.3 ev6.md
--- config/alpha/ev6.md 27 Sep 2003 04:48:12 -0000 1.3
+++ config/alpha/ev6.md 30 Apr 2004 16:07:31 -0000
@@ -22,7 +22,7 @@
; expected to help over-much, but a precise description can be important
; for software pipelining.
;
-; EV6 has two symmetric pairs ("clusters") of two asymetric integer
+; EV6 has two symmetric pairs ("clusters") of two asymmetric integer
; units ("upper" and "lower"), yielding pipe names U0, U1, L0, L1.
;
; ??? The clusters have independent register files that are re-synced
Index: config/arm/arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.355
diff -u -r1.355 arm.c
--- config/arm/arm.c 30 Apr 2004 12:13:48 -0000 1.355
+++ config/arm/arm.c 30 Apr 2004 16:07:37 -0000
@@ -7875,7 +7875,7 @@
/* Add a ^ character for the 26-bit ABI, but only if we were loading
the PC. Otherwise we would generate an UNPREDICTABLE instruction.
- Strictly speaking the instruction would be unpredicatble only if
+ Strictly speaking the instruction would be unpredictable only if
we were writing back the base register as well, but since we never
want to generate an LDM type 2 instruction (register bank switching)
which is what you get if the PC is not being loaded, we do not need
Index: config/c4x/c4x.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x.c,v
retrieving revision 1.146
diff -u -r1.146 c4x.c
--- config/c4x/c4x.c 11 Mar 2004 05:54:29 -0000 1.146
+++ config/c4x/c4x.c 30 Apr 2004 16:07:39 -0000
@@ -1244,7 +1244,7 @@
&& dp_reg_operand (XEXP (op1, 0), mode))
{
/* expand_increment will sometimes create a LO_SUM immediate
- address. Undo this sillyness. */
+ address. Undo this silliness. */
op1 = XEXP (op1, 1);
}
Index: config/c4x/c4x.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x.md,v
retrieving revision 1.86
diff -u -r1.86 c4x.md
--- config/c4x/c4x.md 2 Feb 2004 15:18:14 -0000 1.86
+++ config/c4x/c4x.md 30 Apr 2004 16:07:41 -0000
@@ -154,7 +154,7 @@
; not for 'c'.
; The 'f' constraint is only for float register operands---when
-; a register satisying the 'f' constraint is used as a dst operand,
+; a register satisfying the 'f' constraint is used as a dst operand,
; the CC gets clobbered (except for LDFcond).
; The ! in front of the 'b' constraint says to GCC to disparage the
@@ -190,7 +190,7 @@
; didn't allow it to move the CC around.
; Note that fundamental operations, such as moves, must not clobber the
-; CC. Thus movqi choses a move instruction that doesn't clobber the CC.
+; CC. Thus movqi chooses a move instruction that doesn't clobber the CC.
; If GCC wants to combine a move with a compare, it is smart enough to
; chose the move instruction that sets the CC.
Index: config/cris/cris.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/cris/cris.c,v
retrieving revision 1.52
diff -u -r1.52 cris.c
--- config/cris/cris.c 11 Mar 2004 05:54:30 -0000 1.52
+++ config/cris/cris.c 30 Apr 2004 16:07:42 -0000
@@ -2947,7 +2947,7 @@
int reverse
= (refers_to_regno_p (dregno, dregno + 1, addr, NULL) != 0);
- /* The original code imples that we can't do
+ /* The original code implies that we can't do
move.x [rN+],rM move.x [rN],rM+1
when rN is dead, because of REG_NOTES damage. That is
consistent with what I've seen, so don't try it.
Index: config/cris/cris.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/cris/cris.h,v
retrieving revision 1.71
diff -u -r1.71 cris.h
--- config/cris/cris.h 8 Apr 2004 18:26:08 -0000 1.71
+++ config/cris/cris.h 30 Apr 2004 16:07:44 -0000
@@ -337,7 +337,7 @@
/* Whether or not to work around multiplication instruction hardware bug
when generating code for models where it may be present. From the
trouble report for Etrax 100 LX: "A multiply operation may cause
- incorrect cache behaviour under some specific circumstances. The
+ incorrect cache behavior under some specific circumstances. The
problem can occur if the instruction following the multiply instruction
causes a cache miss, and multiply operand 1 (source operand) bits
[31:27] matches the logical mapping of the mode register address
Index: config/fr30/fr30.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/fr30/fr30.h,v
retrieving revision 1.54
diff -u -r1.54 fr30.h
--- config/fr30/fr30.h 7 Mar 2004 20:23:28 -0000 1.54
+++ config/fr30/fr30.h 30 Apr 2004 16:07:45 -0000
@@ -1208,7 +1208,7 @@
extern struct rtx_def * fr30_compare_op1;
/*}}}*/
-/*{{{ PERDICATE_CODES. */
+/*{{{ PREDICATE_CODES. */
#define PREDICATE_CODES \
{ "stack_add_operand", { CONST_INT }}, \
Index: config/frv/frv.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/frv/frv.c,v
retrieving revision 1.54
diff -u -r1.54 frv.c
--- config/frv/frv.c 3 Mar 2004 08:34:48 -0000 1.54
+++ config/frv/frv.c 30 Apr 2004 16:07:49 -0000
@@ -6627,7 +6627,7 @@
}
-/* Internal function to add a potenial insn to the list of insns to be inserted
+/* Internal function to add a potential insn to the list of insns to be inserted
if the conditional execution conversion is successful. */
static void
Index: config/frv/frv.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/frv/frv.h,v
retrieving revision 1.42
diff -u -r1.42 frv.h
--- config/frv/frv.h 7 Mar 2004 20:23:28 -0000 1.42
+++ config/frv/frv.h 30 Apr 2004 16:07:51 -0000
@@ -931,7 +931,7 @@
#define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + FRV_NUM_ARG_REGS - 1)
/* Registers used by the exception handling functions. These should be
- registers that are not otherwised used by the calling sequence. */
+ registers that are not otherwise used by the calling sequence. */
#define FIRST_EH_REGNUM 14
#define LAST_EH_REGNUM 15
Index: config/frv/frv.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/frv/frv.md,v
retrieving revision 1.12
diff -u -r1.12 frv.md
--- config/frv/frv.md 24 Feb 2004 16:58:39 -0000 1.12
+++ config/frv/frv.md 30 Apr 2004 16:07:54 -0000
@@ -2788,7 +2788,7 @@
[(set_attr "length" "8")
(set_attr "type" "multi")])
-;; Patterns for addsi3/subdi3 after spliting
+;; Patterns for addsi3/subdi3 after splitting
(define_insn "adddi3_lower"
[(set (match_operand:SI 0 "integer_register_operand" "=d")
(plus:SI (match_operand:SI 1 "integer_register_operand" "d")
Index: config/h8300/h8300.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.c,v
retrieving revision 1.287
diff -u -r1.287 h8300.c
--- config/h8300/h8300.c 4 Mar 2004 18:50:24 -0000 1.287
+++ config/h8300/h8300.c 30 Apr 2004 16:07:56 -0000
@@ -4671,7 +4671,7 @@
}
/* Return nonzero if OPERANDS are valid for stm (or ldm) that pushes
- (or pops) N registers. OPERANDS are asssumed to be an array of
+ (or pops) N registers. OPERANDS are assumed to be an array of
registers. */
int
Index: config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.662
diff -u -r1.662 i386.c
--- config/i386/i386.c 12 Apr 2004 23:23:14 -0000 1.662
+++ config/i386/i386.c 30 Apr 2004 16:08:02 -0000
@@ -15817,7 +15817,7 @@
}
/* ... values where only first field is non-constant are best loaded
- from the pool and overwriten via move later. */
+ from the pool and overwritten via move later. */
if (!i)
{
rtx op = simplify_gen_subreg (mode, XVECEXP (vals, 0, 0),
Index: config/i386/i386.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.531
diff -u -r1.531 i386.md
--- config/i386/i386.md 30 Apr 2004 06:04:57 -0000 1.531
+++ config/i386/i386.md 30 Apr 2004 16:08:08 -0000
@@ -14937,7 +14937,7 @@
;; With sincos pattern defined, sin and cos builtin function will be
;; expanded to sincos pattern with one of its outputs left unused.
;; Cse pass will detected, if two sincos patterns can be combined,
-;; otherwise sincos pattern will be splitted back to sin or cos pattern,
+;; otherwise sincos pattern will be split back to sin or cos pattern,
;; depending on the unused output.
(define_insn "sincosdf3"
Index: config/i386/winnt.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/winnt.c,v
retrieving revision 1.63
diff -u -r1.63 winnt.c
--- config/i386/winnt.c 12 Mar 2004 18:25:18 -0000 1.63
+++ config/i386/winnt.c 30 Apr 2004 16:08:08 -0000
@@ -672,7 +672,7 @@
unsigned int **slot;
/* The names we put in the hashtable will always be the unique
- versions gived to us by the stringtable, so we can just use
+ versions given to us by the stringtable, so we can just use
their addresses as the keys. */
if (!htab)
htab = htab_create (31, htab_hash_pointer, htab_eq_pointer, NULL);
Index: config/ia64/itanium2.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ia64/itanium2.md,v
retrieving revision 1.5
diff -u -r1.5 itanium2.md
--- config/ia64/itanium2.md 6 Jul 2003 23:05:09 -0000 1.5
+++ config/ia64/itanium2.md 30 Apr 2004 16:08:09 -0000
@@ -484,7 +484,7 @@
(define_reservation "2_M_only_um01" "2_M0_only_um01|2_M1_only_um01")
;; I instruction is dispersed to the lowest numbered I unit
-;; not already in use. Remeber about possible splitting.
+;; not already in use. Remember about possible splitting.
(define_reservation "2_I0"
"2_0mi.i+2_ui0|2_0mii.+(2_ui0|2_ui1)|2_0mmi.+2_ui0\
|2_0mfi.+2_ui0|2_0mi.b+2_ui0|(2_1mi.i|2_1mi.b)+(2_ui0|2_ui1)\
@@ -1335,7 +1335,7 @@
+(2b_um2|2b_um3)")
;; I instruction is dispersed to the lowest numbered I unit
-;; not already in use. Remeber about possible splitting.
+;; not already in use. Remember about possible splitting.
(define_reservation "2b_I"
"2b_0mi.i+2_2+2b_ui0|2b_0mii.+2_3+(2b_ui0|2b_ui1)|2b_0mmi.+2_3+2b_ui0\
|2b_0mfi.+2_3+2b_ui0|2b_0mi.b+2_2+2b_ui0\
Index: config/ip2k/ip2k.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ip2k/ip2k.c,v
retrieving revision 1.36
diff -u -r1.36 ip2k.c
--- config/ip2k/ip2k.c 3 Mar 2004 08:34:58 -0000 1.36
+++ config/ip2k/ip2k.c 30 Apr 2004 16:08:11 -0000
@@ -2730,7 +2730,7 @@
case GTU:
if (imm_sub)
{
- /* > 0xffffffffffffffff never suceeds! */
+ /* > 0xffffffffffffffff never succeeds! */
if (((const_high & 0xffffffff) != 0xffffffff)
|| ((const_low & 0xffffffff) != 0xffffffff))
{
@@ -2948,7 +2948,7 @@
if (((const_high & 0xffffffff) == 0xffffffff)
&& ((const_low & 0xffffffff) == 0xffffffff))
{
- /* <= 0xffffffffffffffff always suceeds. */
+ /* <= 0xffffffffffffffff always succeeds. */
OUT_AS1 (page, %2);
OUT_AS1 (jmp, %2);
}
Index: config/mips/mips.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.c,v
retrieving revision 1.407
diff -u -r1.407 mips.c
--- config/mips/mips.c 25 Apr 2004 08:28:25 -0000 1.407
+++ config/mips/mips.c 30 Apr 2004 16:08:16 -0000
@@ -4762,7 +4762,7 @@
(1) The value of an R_MIPS_GOT16 relocation depends on whether
the symbol is local or global. We therefore need to know
- a symbol's binding before refering to it using %got().
+ a symbol's binding before referring to it using %got().
(2) R_MIPS_CALL16 can only be applied to global symbols.
Index: config/mips/mips.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.h,v
retrieving revision 1.337
diff -u -r1.337 mips.h
--- config/mips/mips.h 25 Apr 2004 08:28:25 -0000 1.337
+++ config/mips/mips.h 30 Apr 2004 16:08:18 -0000
@@ -2076,7 +2076,7 @@
`T' is for constant move_operands that cannot be safely loaded into $25.
`U' is for constant move_operands that can be safely loaded into $25.
`W' is for memory references that are based on a member of BASE_REG_CLASS.
- This is true for all non-mips16 references (although it can somtimes
+ This is true for all non-mips16 references (although it can sometimes
be indirect if !TARGET_EXPLICIT_RELOCS). For mips16, it excludes
stack and constant-pool references. */
Index: config/mips/sr71k.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/sr71k.md,v
retrieving revision 1.8
diff -u -r1.8 sr71k.md
--- config/mips/sr71k.md 18 Mar 2004 23:47:31 -0000 1.8
+++ config/mips/sr71k.md 30 Apr 2004 16:08:18 -0000
@@ -17,7 +17,7 @@
;; contrived to support published timings.
;;
;; Reference:
-;; "SR3 Microporocessor Specification, System development information,"
+;; "SR3 Microprocessor Specification, System development information,"
;; Revision 1.0, 13 December 2000.
;;
;;
Index: config/pa/pa.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pa/pa.c,v
retrieving revision 1.246
diff -u -r1.246 pa.c
--- config/pa/pa.c 11 Mar 2004 05:54:33 -0000 1.246
+++ config/pa/pa.c 30 Apr 2004 16:08:22 -0000
@@ -8419,7 +8419,7 @@
markers disables output of the branch table to readonly memory,
and any alignment directives that might be needed. Possibly,
the begin_brtab insn should be output before the label for the
- table. This doesn matter at the moment since the tables are
+ table. This doesn't matter at the moment since the tables are
always output in the text section. */
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
{
Index: config/s390/s390.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.c,v
retrieving revision 1.140
diff -u -r1.140 s390.c
--- config/s390/s390.c 1 Apr 2004 03:50:34 -0000 1.140
+++ config/s390/s390.c 30 Apr 2004 16:08:25 -0000
@@ -5219,7 +5219,7 @@
return gen_rtx_MEM (Pmode, addr);
}
-/* Find first call clobbered register unsused in a function.
+/* Find first call clobbered register unused in a function.
This could be used as base register in a leaf function
or for holding the return address before epilogue. */
Index: config/sh/sh.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.c,v
retrieving revision 1.265
diff -u -r1.265 sh.c
--- config/sh/sh.c 30 Apr 2004 05:59:06 -0000 1.265
+++ config/sh/sh.c 30 Apr 2004 16:08:30 -0000
@@ -338,7 +338,7 @@
TARGET_SCHED_INIT_GLOBAL: Added a new target hook in the generic
scheduler; it is called inside the sched_init function just after
find_insn_reg_weights function call. It is used to calculate the SImode
- and SFmode weights of insns of basic blocks; much similiar to what
+ and SFmode weights of insns of basic blocks; much similar to what
find_insn_reg_weights does.
TARGET_SCHED_FINISH_GLOBAL: Corresponding cleanup hook.