Re: [Patch] [PPC] Convert peephole to peephole2

[Andrew Pinski <pinskia at physics dot uc dot edu>]

On Apr 28, 2004, at 23:02, Daniel Jacobowitz wrote:

> On Wed, Apr 28, 2004 at 06:53:09PM -0400, Andrew Pinski wrote:
> > /* { dg-do assemble { target powerpc-*-* rs6000-*-* }  } */
> > /* { dg-final { scan-assembler-not "lfd" } } */
> > /* { dg-final { scan-assembler-not "sfd" } } */
> > /* { dg-final { scan-assembler "lfq" } } */
> > /* { dg-final { scan-assembler "sfq" } } */
>
> Explicitly specify -mhard-float?  Otherwise --with-float=soft will show
> test failures as will a -msoft-float multilib.
>
> In general any of the --with options can produce unpredictable
> testsuite results, but I try to keep it to a minimum.


I noticed a couple of more mistakes I made in the two testcases.
One was I forgot -w in the second testcase.
Another was that peephole2's do not happen at -O.
And that -mpower2 should really be -mcpu=power2 as recommended by
the manual.
And last but not least, the registers passed should be frn as frn
is recognized by every rs6000 target.

Committed.

Thanks,
Andrew Pinski

ChangeLog:
	* gcc.dg/rs6000-power2-1.c: Change the options to be more correct.
	* gcc.dg/rs6000-power2-2.c: Change the options to be more correct.
	Change the asm registers to be in form of frN instead of fN.

Patch:
Index: gcc.dg/rs6000-power2-1.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/testsuite/gcc.dg/rs6000-power2-1.c,v
retrieving revision 1.1
diff -u -p -r1.1 rs6000-power2-1.c
--- gcc.dg/rs6000-power2-1.c	28 Apr 2004 23:03:31 -0000	1.1
+++ gcc.dg/rs6000-power2-1.c	29 Apr 2004 19:30:53 -0000
@@ -1,5 +1,5 @@
 /* { dg-do assemble { target powerpc-*-* rs6000-*-* }  } */
-/* { dg-options "-O -mpower2 -fno-schedule-insns -w" } */
+/* { dg-options "-O3 -mcpu=power2 -fno-schedule-insns -w -mhard-float" 
} */
 /* This used to ICE as the peephole was not checking to see
    if the register is a floating point one (I think this cannot
    happen in real life except in this example).  */
Index: gcc.dg/rs6000-power2-2.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/testsuite/gcc.dg/rs6000-power2-2.c,v
retrieving revision 1.1
diff -u -p -r1.1 rs6000-power2-2.c
--- gcc.dg/rs6000-power2-2.c	28 Apr 2004 23:03:31 -0000	1.1
+++ gcc.dg/rs6000-power2-2.c	29 Apr 2004 19:30:53 -0000
@@ -1,13 +1,13 @@
 /* { dg-do assemble { target powerpc-*-* rs6000-*-* }  } */
-/* { dg-options "-O -mpower2 -fno-schedule-insns" } */
+/* { dg-options "-O3 -mcpu=power2 -fno-schedule-insns -w -mhard-float" 
} */
 /* { dg-final { scan-assembler-not "lfd" } } */
 /* { dg-final { scan-assembler-not "sfd" } } */
 /* { dg-final { scan-assembler "lfq" } } */
 /* { dg-final { scan-assembler "sfq" } } */

-register double t1 __asm__("f0");
-register double t2 __asm__("f1");
-register double t3 __asm__("f2"), t4 __asm__("f3");
+register double t1 __asm__("fr0");
+register double t2 __asm__("fr1");
+register double t3 __asm__("fr2"), t4 __asm__("fr3");
 void t(double *a, double *b)
 {
         t1 = a[-1];

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