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[patch] i386: Remove const_int_1_operand.
- From: Kazu Hirata <kazu at cs dot umass dot edu>
- To: gcc-patches at gcc dot gnu dot org
- Date: Sat, 27 Dec 2003 08:05:05 -0500 (EST)
- Subject: [patch] i386: Remove const_int_1_operand.
Hi,
Attached is a patch to remove const_int_1_operand() in i386.c, which
does exactly the same thing as const1_operand().
This problem has been raised before, but the patch never made it.
http://gcc.gnu.org/ml/gcc-patches/2000-11/msg00277.html
Tested on i686-pc-linux-gnu. OK to apply?
Kazu Hirata
2003-12-27 Kazu Hirata <kazu@cs.umass.edu>
* config/i386/i386-protos.h: Remove prototype for
const_int_1_operand.
* config/i386/i386.c (const_int_1_operand): Remove.
* config/i386/i386.h (PREDICATE_CODES): Remove
const_int_1_operand.
* config/i386/i386.md: Replace all uses of const_int_1_operand
with const1_operand.
* config/i386/pentium.md: Likewise.
Index: i386-protos.h
===================================================================
RCS file: /home/kazu/nobackup/gcc-cvs/gcc/gcc/config/i386/i386-protos.h,v
retrieving revision 1.102
diff -u -r1.102 i386-protos.h
--- i386-protos.h 30 Oct 2003 02:02:38 -0000 1.102
+++ i386-protos.h 27 Dec 2003 06:08:21 -0000
@@ -59,7 +59,6 @@
extern int x86_64_szext_nonmemory_operand (rtx, enum machine_mode);
extern int x86_64_immediate_operand (rtx, enum machine_mode);
extern int x86_64_zext_immediate_operand (rtx, enum machine_mode);
-extern int const_int_1_operand (rtx, enum machine_mode);
extern int symbolic_operand (rtx, enum machine_mode);
extern int tls_symbolic_operand (rtx, enum machine_mode);
extern int global_dynamic_symbolic_operand (rtx, enum machine_mode);
Index: i386.c
===================================================================
RCS file: /home/kazu/nobackup/gcc-cvs/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.625
diff -u -r1.625 i386.c
--- i386.c 20 Dec 2003 21:56:47 -0000 1.625
+++ i386.c 27 Dec 2003 06:08:21 -0000
@@ -3419,14 +3419,6 @@
return x86_64_zero_extended_value (op);
}
-/* Return nonzero if OP is (const_int 1), else return zero. */
-
-int
-const_int_1_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- return op == const1_rtx;
-}
-
/* Return nonzero if OP is CONST_INT >= 1 and <= 31 (a valid operand
for shift & compare patterns, as shifting by 0 does not change flags),
else return zero. */
Index: i386.h
===================================================================
RCS file: /home/kazu/nobackup/gcc-cvs/gcc/gcc/config/i386/i386.h,v
retrieving revision 1.361
diff -u -r1.361 i386.h
--- i386.h 22 Dec 2003 05:52:51 -0000 1.361
+++ i386.h 27 Dec 2003 06:08:21 -0000
@@ -2919,7 +2919,6 @@
{"x86_64_zext_immediate_operand", {CONST_INT, CONST_DOUBLE, CONST, \
SYMBOL_REF, LABEL_REF}}, \
{"shiftdi_operand", {SUBREG, REG, MEM}}, \
- {"const_int_1_operand", {CONST_INT}}, \
{"const_int_1_31_operand", {CONST_INT}}, \
{"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
{"aligned_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
Index: i386.md
===================================================================
RCS file: /home/kazu/nobackup/gcc-cvs/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.494
diff -u -r1.494 i386.md
--- i386.md 13 Dec 2003 04:44:05 -0000 1.494
+++ i386.md 27 Dec 2003 06:08:21 -0000
@@ -11174,7 +11174,7 @@
(define_insn "*ashrdi3_1_one_bit_rex64"
[(set (match_operand:DI 0 "nonimmediate_operand" "=rm")
(ashiftrt:DI (match_operand:DI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"TARGET_64BIT && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -11204,7 +11204,7 @@
[(set (reg 17)
(compare
(ashiftrt:DI (match_operand:DI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" ""))
+ (match_operand:QI 2 "const1_operand" ""))
(const_int 0)))
(set (match_operand:DI 0 "nonimmediate_operand" "=rm")
(ashiftrt:DI (match_dup 1) (match_dup 2)))]
@@ -11363,7 +11363,7 @@
(define_insn "*ashrsi3_1_one_bit"
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"ix86_binary_operator_ok (ASHIFTRT, SImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -11377,7 +11377,7 @@
(define_insn "*ashrsi3_1_one_bit_zext"
[(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI (ashiftrt:SI (match_operand:SI 1 "register_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" ""))))
+ (match_operand:QI 2 "const1_operand" ""))))
(clobber (reg:CC 17))]
"TARGET_64BIT && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -11416,7 +11416,7 @@
[(set (reg 17)
(compare
(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" ""))
+ (match_operand:QI 2 "const1_operand" ""))
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(ashiftrt:SI (match_dup 1) (match_dup 2)))]
@@ -11434,7 +11434,7 @@
[(set (reg 17)
(compare
(ashiftrt:SI (match_operand:SI 1 "register_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" ""))
+ (match_operand:QI 2 "const1_operand" ""))
(const_int 0)))
(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI (ashiftrt:SI (match_dup 1) (match_dup 2))))]
@@ -11487,7 +11487,7 @@
(define_insn "*ashrhi3_1_one_bit"
[(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"ix86_binary_operator_ok (ASHIFTRT, HImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -11517,7 +11517,7 @@
[(set (reg 17)
(compare
(ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" ""))
+ (match_operand:QI 2 "const1_operand" ""))
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(ashiftrt:HI (match_dup 1) (match_dup 2)))]
@@ -11559,7 +11559,7 @@
(define_insn "*ashrqi3_1_one_bit"
[(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
(ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"ix86_binary_operator_ok (ASHIFTRT, QImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -11573,7 +11573,7 @@
(define_insn "*ashrqi3_1_one_bit_slp"
[(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm"))
(ashiftrt:QI (match_dup 0)
- (match_operand:QI 1 "const_int_1_operand" "")))
+ (match_operand:QI 1 "const1_operand" "")))
(clobber (reg:CC 17))]
"ix86_binary_operator_ok (ASHIFTRT, QImode, operands)
&& (! TARGET_PARTIAL_REG_STALL || optimize_size)
@@ -11617,7 +11617,7 @@
[(set (reg 17)
(compare
(ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "I"))
+ (match_operand:QI 2 "const1_operand" "I"))
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
(ashiftrt:QI (match_dup 1) (match_dup 2)))]
@@ -11671,7 +11671,7 @@
(define_insn "*lshrdi3_1_one_bit_rex64"
[(set (match_operand:DI 0 "nonimmediate_operand" "=rm")
(lshiftrt:DI (match_operand:DI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"TARGET_64BIT && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -11701,7 +11701,7 @@
[(set (reg 17)
(compare
(lshiftrt:DI (match_operand:DI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" ""))
+ (match_operand:QI 2 "const1_operand" ""))
(const_int 0)))
(set (match_operand:DI 0 "nonimmediate_operand" "=rm")
(lshiftrt:DI (match_dup 1) (match_dup 2)))]
@@ -11781,7 +11781,7 @@
(define_insn "*lshrsi3_1_one_bit"
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -11795,7 +11795,7 @@
(define_insn "*lshrsi3_1_one_bit_zext"
[(set (match_operand:DI 0 "register_operand" "=r")
(lshiftrt:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "0"))
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"TARGET_64BIT && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -11835,7 +11835,7 @@
[(set (reg 17)
(compare
(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" ""))
+ (match_operand:QI 2 "const1_operand" ""))
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(lshiftrt:SI (match_dup 1) (match_dup 2)))]
@@ -11853,7 +11853,7 @@
[(set (reg 17)
(compare
(lshiftrt:SI (match_operand:SI 1 "register_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" ""))
+ (match_operand:QI 2 "const1_operand" ""))
(const_int 0)))
(set (match_operand:DI 0 "register_operand" "=r")
(lshiftrt:DI (zero_extend:DI (match_dup 1)) (match_dup 2)))]
@@ -11906,7 +11906,7 @@
(define_insn "*lshrhi3_1_one_bit"
[(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -11936,7 +11936,7 @@
[(set (reg 17)
(compare
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" ""))
+ (match_operand:QI 2 "const1_operand" ""))
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(lshiftrt:HI (match_dup 1) (match_dup 2)))]
@@ -11978,7 +11978,7 @@
(define_insn "*lshrqi3_1_one_bit"
[(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"ix86_binary_operator_ok (LSHIFTRT, QImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -11992,7 +11992,7 @@
(define_insn "*lshrqi3_1_one_bit_slp"
[(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm"))
(lshiftrt:QI (match_dup 0)
- (match_operand:QI 1 "const_int_1_operand" "")))
+ (match_operand:QI 1 "const1_operand" "")))
(clobber (reg:CC 17))]
"(! TARGET_PARTIAL_REG_STALL || optimize_size)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -12035,7 +12035,7 @@
[(set (reg 17)
(compare
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" ""))
+ (match_operand:QI 2 "const1_operand" ""))
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
(lshiftrt:QI (match_dup 1) (match_dup 2)))]
@@ -12079,7 +12079,7 @@
(define_insn "*rotlsi3_1_one_bit_rex64"
[(set (match_operand:DI 0 "nonimmediate_operand" "=rm")
(rotate:DI (match_operand:DI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"TARGET_64BIT && ix86_binary_operator_ok (ROTATE, DImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -12113,7 +12113,7 @@
(define_insn "*rotlsi3_1_one_bit"
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(rotate:SI (match_operand:SI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"ix86_binary_operator_ok (ROTATE, SImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -12128,7 +12128,7 @@
[(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI
(rotate:SI (match_operand:SI 1 "register_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" ""))))
+ (match_operand:QI 2 "const1_operand" ""))))
(clobber (reg:CC 17))]
"TARGET_64BIT && ix86_binary_operator_ok (ROTATE, SImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -12172,7 +12172,7 @@
(define_insn "*rotlhi3_1_one_bit"
[(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(rotate:HI (match_operand:HI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"ix86_binary_operator_ok (ROTATE, HImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -12206,7 +12206,7 @@
(define_insn "*rotlqi3_1_one_bit_slp"
[(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm"))
(rotate:QI (match_dup 0)
- (match_operand:QI 1 "const_int_1_operand" "")))
+ (match_operand:QI 1 "const1_operand" "")))
(clobber (reg:CC 17))]
"(! TARGET_PARTIAL_REG_STALL || optimize_size)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -12220,7 +12220,7 @@
(define_insn "*rotlqi3_1_one_bit"
[(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
(rotate:QI (match_operand:QI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"ix86_binary_operator_ok (ROTATE, QImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -12267,7 +12267,7 @@
(define_insn "*rotrdi3_1_one_bit_rex64"
[(set (match_operand:DI 0 "nonimmediate_operand" "=rm")
(rotatert:DI (match_operand:DI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"TARGET_64BIT && ix86_binary_operator_ok (ROTATERT, DImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -12301,7 +12301,7 @@
(define_insn "*rotrsi3_1_one_bit"
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(rotatert:SI (match_operand:SI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"ix86_binary_operator_ok (ROTATERT, SImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -12316,7 +12316,7 @@
[(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI
(rotatert:SI (match_operand:SI 1 "register_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" ""))))
+ (match_operand:QI 2 "const1_operand" ""))))
(clobber (reg:CC 17))]
"TARGET_64BIT && ix86_binary_operator_ok (ROTATERT, SImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -12363,7 +12363,7 @@
(define_insn "*rotrhi3_one_bit"
[(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(rotatert:HI (match_operand:HI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"ix86_binary_operator_ok (ROTATERT, HImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -12397,7 +12397,7 @@
(define_insn "*rotrqi3_1_one_bit"
[(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
(rotatert:QI (match_operand:QI 1 "nonimmediate_operand" "0")
- (match_operand:QI 2 "const_int_1_operand" "")))
+ (match_operand:QI 2 "const1_operand" "")))
(clobber (reg:CC 17))]
"ix86_binary_operator_ok (ROTATERT, QImode, operands)
&& (TARGET_SHIFT1 || optimize_size)"
@@ -12411,7 +12411,7 @@
(define_insn "*rotrqi3_1_one_bit_slp"
[(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm"))
(rotatert:QI (match_dup 0)
- (match_operand:QI 1 "const_int_1_operand" "")))
+ (match_operand:QI 1 "const1_operand" "")))
(clobber (reg:CC 17))]
"(! TARGET_PARTIAL_REG_STALL || optimize_size)
&& (TARGET_SHIFT1 || optimize_size)"
Index: pentium.md
===================================================================
RCS file: /home/kazu/nobackup/gcc-cvs/gcc/gcc/config/i386/pentium.md,v
retrieving revision 1.8
diff -u -r1.8 pentium.md
--- pentium.md 26 Sep 2003 04:07:46 -0000 1.8
+++ pentium.md 27 Dec 2003 06:08:21 -0000
@@ -51,13 +51,13 @@
(match_operand 2 "const_int_operand" ""))
(const_string "pu")
(and (eq_attr "type" "rotate")
- (match_operand 2 "const_int_1_operand" ""))
+ (match_operand 2 "const1_operand" ""))
(const_string "pu")
(and (eq_attr "type" "ishift1")
(match_operand 1 "const_int_operand" ""))
(const_string "pu")
(and (eq_attr "type" "rotate1")
- (match_operand 1 "const_int_1_operand" ""))
+ (match_operand 1 "const1_operand" ""))
(const_string "pu")
(and (eq_attr "type" "call")
(match_operand 0 "constant_call_address_operand" ""))