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Re: PATCH:[darwin] fix load of a misaligned double word
On Dec 22, 2003, at 7:34 PM, Andrew Pinski wrote:
This patch is fix the load/stores of double words (ld/std
instructions).
The PPC ISA defines them as being always using 4 byte aligned offsets.
So the patch was to fix the output of the right asm but it looks like
a side effect is that it the load and stores of doubles (lfd/stfd),
the offset
also get aligned which causes this performance problem.
At the risk of exposing too much of my ignorance here, how can the
assembler tell whether 3(r4) is not aligned on any 4-byte, 8-byte,
etc., boundary? It depends on what is in r4, doesn't it?
Brad