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Re: [PATCH] - Use of powerpc 64bit instructions in 32bit ABI
- From: David Edelsohn <dje at watson dot ibm dot com>
- To: Fariborz Jahanian <fjahanian at apple dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Fri, 17 Oct 2003 13:05:20 -0400
- Subject: Re: [PATCH] - Use of powerpc 64bit instructions in 32bit ABI
- References: <76A14983-FE8E-11D7-A62D-000393B9ED88@apple.com>
* rs6000.md: Separate TARGET_POWERPC64 patterns for
TARGET_64BIT or TARGET_32BIT.
(ashrdi3_to_si_no_power) Generate more efficient code for
32-bit right-shift of a "long long" argument.
The rs6000.md changes are independent of the rest of the support, so let's
fix those and merge those into the FSF sources to decrease the size of
future patches.
I believe that you have a merge error with one pair of patterns
and a style problem with another that need to be corrected for the patch
to be committed.
***************
*** 8671,8677 ****
[(parallel [(set (match_operand:TI 0 "general_operand" "")
(match_operand:TI 1 "general_operand" ""))
(clobber (scratch:SI))])]
! ""
"{ rs6000_emit_move (operands[0], operands[1], TImode); DONE; }")
;; We say that MQ is clobbered in the last alternative because the first
--- 8692,8698 ----
[(parallel [(set (match_operand:TI 0 "general_operand" "")
(match_operand:TI 1 "general_operand" ""))
(clobber (scratch:SI))])]
! "TARGET_STRING || TARGET_POWERPC64"
"{ rs6000_emit_move (operands[0], operands[1], TImode); DONE; }")
;; We say that MQ is clobbered in the last alternative because the first
***************
*** 8684,8690 ****
[(set (match_operand:TI 0 "reg_or_mem_operand" "=Q,m,????r,????r,????r")
(match_operand:TI 1 "reg_or_mem_operand" "r,r,r,Q,m"))
(clobber (match_scratch:SI 2 "=q,q#X,X,X,X"))]
! "TARGET_POWER && ! TARGET_POWERPC64
&& (gpc_reg_operand (operands[0], TImode) || gpc_reg_operand (operands[1], TImode))"
"*
{
--- 8705,8711 ----
[(set (match_operand:TI 0 "reg_or_mem_operand" "=Q,m,????r,????r,????r")
(match_operand:TI 1 "reg_or_mem_operand" "r,r,r,Q,m"))
(clobber (match_scratch:SI 2 "=q,q#X,X,X,X"))]
! "TARGET_POWER && ! TARGET_POWERPC64
&& (gpc_reg_operand (operands[0], TImode) || gpc_reg_operand (operands[1], TImode))"
"*
{
TImode uniformly and explicitly was enabled for all targets. Your patch
disables it without explanation. Please remove the above changes from
your patch.
+ (define_insn "ashrdi3_to_si_no_power"
+ [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
+ (subreg:SI (ashiftrt:DI (match_operand:DI 1 "gpc_reg_operand" "r")
+ (const_int 32)) 4))]
+ "TARGET_32BIT && !TARGET_POWERPC64"
+ "*
+ {
+ if (REGNO (operands[0]) == REGNO (operands[1]))
+ return \"\";
+ else
+ return \"mr %0,%1\";
+ }"
+ [(set_attr "length" "4")])
The above pattern is never referenced explicitly, so it's name should have
`*' prepended. Also, the pattern condition has nothing to do with
TARGET_POWER, so it should not have "no_power" in its name. I would
suggest a name like "*ashrdisi3_noppc64".
The rs6000.md subset of the patch, and *only* the rs6000.md subset
of the patch, is okay with those above changes.
Thanks, David