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[PATCH] Testsuite gcc.dg mis-alignment on MIPS


Hi,

This regression test causes an write to unaligned address on MIPS-SIM
using target board expect file mips-sim-idt32:

  mips-core: 4 byte write to unaligned address 0x800240c2 at 0x800211d8

a store word is generated for a 16bit address.
the declaration of g_##TMODE was extern int, but the actual declaration
after pre-processing generates a series of different types of different
sizes according to type TMODE.  this caused incorrect instruction issued
to address data not correctly aligned.

ok?

David.


2003-10-10  David Ung  <davidu@mips.com>

        * gcc.dg/compat/vector-check.h: Corrected type for var 
        g_##TMODE


Index: gcc/testsuite/gcc.dg/compat/vector-check.h
===================================================================
RCS file: /cvs/uberbaum/gcc/testsuite/gcc.dg/compat/vector-check.h,v
retrieving revision 1.1
diff -u -p -w -r1.1 vector-check.h
--- gcc/testsuite/gcc.dg/compat/vector-check.h  3 Jul 2003 20:37:42
-0000       1.1
+++ gcc/testsuite/gcc.dg/compat/vector-check.h  10 Oct 2003 10:55:33
-0000
@@ -1,6 +1,6 @@
 #define TEST(NUM,TMODE,VAL)                            \
 extern v##NUM##TMODE g_v##NUM##TMODE;                  \
-extern int g_##TMODE;                                  \
+extern TMODE g_##TMODE;                                        \
                                                        \
 extern void pass_v##NUM##TMODE (v##NUM##TMODE);                \
 extern v##NUM##TMODE return_v##NUM##TMODE (void);      \


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