This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: PATCH RFC: Fix ARM bug by splitting up iwmmxt_movsi_insn
- From: Ian Lance Taylor <ian at wasabisystems dot com>
- To: Richard dot Earnshaw at arm dot com
- Cc: gcc-patches at gcc dot gnu dot org
- Date: 13 Oct 2003 19:22:15 -0700
- Subject: Re: PATCH RFC: Fix ARM bug by splitting up iwmmxt_movsi_insn
- References: <200310130912.h9D9Cmk19929@pc960.cambridge.arm.com>
Richard Earnshaw <rearnsha@arm.com> writes:
> This is ok, with a couple of minor changes.
I checked in the appended patch.
> > + [(set_attr "type" "*,*,load,store1,*,*,load")
> > + (set_attr "length" "*,*,*, *,*,*, 16")
> > + (set_attr "pool_range" "*,*,4096, *,*,*,1024")
> > + (set_attr "neg_pool_range" "*,*,4084, *,*,*, *")
> ^^^^
> This should probably be 1012 (in the base pattern, this appears to be
> mis-placed on to the following alternative).
In the final patch, that column got removed. I didn't make any change
to iwmmxt_movsi_insn, although it sounds like the attribute values are
wrong, because I've never bothered to look into those attributes.
Ian
2003-10-13 Ian Lance Taylor <ian@wasabisystems.com>
* config/arm/iwmmxt.md (cond_iwmmxt_movsi_insn): New pattern.
* config/arm/arm.md: For splits which rely on conditional moves,
remove ! TARGET_IWMMXT condition.
Index: arm.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.md,v
retrieving revision 1.141
diff -u -r1.141 arm.md
--- arm.md 7 Oct 2003 08:49:36 -0000 1.141
+++ arm.md 14 Oct 2003 02:10:02 -0000
@@ -8522,10 +8522,7 @@
(match_dup 0)
(match_operand 4 "" "")))
(clobber (reg:CC CC_REGNUM))]
- ;; Note we have to suppress this split for the iwmmxt because it
- ;; creates a conditional movsi and the iwmmxt_movsi_insn pattern
- ;; is not predicable. This sucks.
- "TARGET_ARM && reload_completed && ! TARGET_IWMMXT"
+ "TARGET_ARM && reload_completed"
[(set (match_dup 5) (match_dup 6))
(cond_exec (match_dup 7)
(set (match_dup 0) (match_dup 4)))]
@@ -8553,10 +8550,7 @@
(match_operand 4 "" "")
(match_dup 0)))
(clobber (reg:CC CC_REGNUM))]
- ;; Note we have to suppress this split for the iwmmxt because it
- ;; creates a conditional movsi and the iwmmxt_movsi_insn pattern
- ;; is not predicable. This sucks.
- "TARGET_ARM && reload_completed && ! TARGET_IWMMXT"
+ "TARGET_ARM && reload_completed"
[(set (match_dup 5) (match_dup 6))
(cond_exec (match_op_dup 1 [(match_dup 5) (const_int 0)])
(set (match_dup 0) (match_dup 4)))]
@@ -8577,10 +8571,7 @@
(match_operand 4 "" "")
(match_operand 5 "" "")))
(clobber (reg:CC CC_REGNUM))]
- ;; Note we have to suppress this split for the iwmmxt because it
- ;; creates a conditional movsi and the iwmmxt_movsi_insn pattern
- ;; is not predicable. This sucks.
- "TARGET_ARM && reload_completed && ! TARGET_IWMMXT"
+ "TARGET_ARM && reload_completed"
[(set (match_dup 6) (match_dup 7))
(cond_exec (match_op_dup 1 [(match_dup 6) (const_int 0)])
(set (match_dup 0) (match_dup 4)))
@@ -8612,10 +8603,7 @@
(not:SI
(match_operand:SI 5 "s_register_operand" ""))))
(clobber (reg:CC CC_REGNUM))]
- ;; Note we have to suppress this split for the iwmmxt because it
- ;; creates a conditional movsi and the iwmmxt_movsi_insn pattern
- ;; is not predicable. This sucks.
- "TARGET_ARM && reload_completed && ! TARGET_IWMMXT"
+ "TARGET_ARM && reload_completed"
[(set (match_dup 6) (match_dup 7))
(cond_exec (match_op_dup 1 [(match_dup 6) (const_int 0)])
(set (match_dup 0) (match_dup 4)))
Index: iwmmxt.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/iwmmxt.md,v
retrieving revision 1.2
diff -u -r1.2 iwmmxt.md
--- iwmmxt.md 28 Jun 2003 19:43:00 -0000 1.2
+++ iwmmxt.md 14 Oct 2003 02:10:02 -0000
@@ -116,12 +116,41 @@
(set_attr "neg_pool_range" "*,*,4084, *,*,*, *, 1012,*")
;; Note - the "predicable" attribute is not allowed to have alternatives.
;; Since the wSTRw wCx instruction is not predicable, we cannot support
- ;; predicating any of the alternatives in this template. This sucks.
+ ;; predicating any of the alternatives in this template. Instead,
+ ;; we do the predication ourselves, in cond_iwmmxt_movsi_insn.
(set_attr "predicable" "no")
;; Also - we have to pretend that these insns clobber the condition code
;; bits as otherwise arm_final_prescan_insn() will try to conditionalize
;; them.
(set_attr "conds" "clob")]
+)
+
+;; Because iwmmxt_movsi_insn is not predicable, we provide the
+;; cond_exec version explicitly, with appropriate constraints.
+
+(define_insn "*cond_iwmmxt_movsi_insn"
+ [(cond_exec
+ (match_operator 2 "arm_comparison_operator"
+ [(match_operand 3 "cc_register" "")
+ (const_int 0)])
+ (set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r, m,z,r")
+ (match_operand:SI 1 "general_operand" "rI,K,mi,r,r,z")))]
+ "TARGET_REALLY_IWMMXT
+ && ( register_operand (operands[0], SImode)
+ || register_operand (operands[1], SImode))"
+ "*
+ switch (which_alternative)
+ {
+ case 0: return \"mov%?\\t%0, %1\";
+ case 1: return \"mvn%?\\t%0, #%B1\";
+ case 2: return \"ldr%?\\t%0, %1\";
+ case 3: return \"str%?\\t%1, %0\";
+ case 4: return \"tmcr%?\\t%0, %1\";
+ default: return \"tmrc%?\\t%0, %1\";
+ }"
+ [(set_attr "type" "*,*,load,store1,*,*")
+ (set_attr "pool_range" "*,*,4096, *,*,*")
+ (set_attr "neg_pool_range" "*,*,4084, *,*,*")]
)
(define_insn "movv8qi_internal"