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[patch] h8300.md: Add a new bit testing pattern.
- From: Kazu Hirata <kazu at cs dot umass dot edu>
- To: gcc-patches at gcc dot gnu dot org
- Date: Mon, 29 Sep 2003 12:34:28 -0400 (EDT)
- Subject: [patch] h8300.md: Add a new bit testing pattern.
Hi,
Attached is a patch to add a new bit testing pattern.
On H8, the bit testing like
if (a & (1 << (b & 7)))
...
can be done with one instruction, btst. The patch adds a pattern to
make use of the instruction. It also adds a pattern that uses a
memory operand.
In terms of assembly code,
sub.l er0,er0
mov.b r2l,r0l
sub.l er2,er2
mov.b r4l,r2l
and #7,r2l
mov.b r2l,r2l
ble .L138
.L137:
shlr.l er0
add.b #-1,r2l
bne .L137
.L138:
btst #0,r0l
bne .L123:16
is crammed into
btst r4l,r2l
bne .L119:16
Tested on h8300 port. Committed.
Kazu Hirata
2003-09-29 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.md (*tstsi_variable_bit): New.
(*tstsi_variable_bit_qi): Likewise.
Index: h8300.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.md,v
retrieving revision 1.234
diff -u -r1.234 h8300.md
--- h8300.md 21 Aug 2003 13:13:17 -0000 1.234
+++ h8300.md 29 Sep 2003 05:48:04 -0000
@@ -652,6 +652,42 @@
(match_dup 3)))]
"operands[3] = GEN_INT (INTVAL (operands[1]) - 16);")
+(define_insn "*tstsi_variable_bit"
+ [(set (cc0)
+ (zero_extract:SI (match_operand:SI 0 "register_operand" "r")
+ (const_int 1)
+ (and:SI (match_operand:SI 1 "register_operand" "r")
+ (const_int 7))))]
+ "TARGET_H8300H || TARGET_H8300S"
+ "btst %w1,%w0"
+ [(set_attr "length" "2")
+ (set_attr "cc" "set_zn")])
+
+(define_insn_and_split "*tstsi_variable_bit_qi"
+ [(set (cc0)
+ (zero_extract:SI (zero_extend:SI (match_operand:QI 0 "general_operand_src" "r,U,mn>"))
+ (const_int 1)
+ (and:SI (match_operand:SI 1 "register_operand" "r,r,r")
+ (const_int 7))))
+ (clobber (match_scratch:QI 2 "=X,X,&r"))]
+ "(TARGET_H8300H || TARGET_H8300S)"
+ "@
+ btst\\t%w1,%X0
+ btst\\t%w1,%X0
+ #"
+ "&& reload_completed
+ && !EXTRA_CONSTRAINT (operands[0], 'U')"
+ [(set (match_dup 2)
+ (match_dup 0))
+ (parallel [(set (cc0) (zero_extract:SI (zero_extend:SI (match_dup 2))
+ (const_int 1)
+ (and:SI (match_dup 1)
+ (const_int 7))))
+ (clobber (scratch:QI))])]
+ ""
+ [(set_attr "length" "2,8,10")
+ (set_attr "cc" "set_zn,set_zn,set_zn")])
+
(define_insn "tstqi"
[(set (cc0) (match_operand:QI 0 "register_operand" "r"))]
""