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m32r short branches may be out of range
- From: Alexandre Oliva <aoliva at redhat dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: 24 Sep 2003 19:23:39 -0300
- Subject: m32r short branches may be out of range
- Organization: GCC Team, Red Hat
I got a testcase from a customer with a switch statement that, with an
old toolchain they're using, triggers an out-of-range branch error in
the assembler. I couldn't update their testcase such that it would
fail in mainline, and it would hardly make sense, since it's really
impossible to do this kind of test predictably. So I'm just posting
this patch, that makes sure we won't ever choose a short branch unless
we're absolutely sure it's going to fit. Assembler relaxations should
take care of narrowing those that we overestimate.
Ok to install?
Index: gcc/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
* config/m32r/m32r.md (type branch): Use worst-case limits when
deciding whether to choose short branches.
(jump): Likewise.
Index: gcc/config/m32r/m32r.md
===================================================================
RCS file: /cvs/uberbaum/gcc/config/m32r/m32r.md,v
retrieving revision 1.29
diff -u -p -r1.29 m32r.md
--- gcc/config/m32r/m32r.md 6 Jul 2003 23:05:11 -0000 1.29
+++ gcc/config/m32r/m32r.md 24 Sep 2003 22:18:34 -0000
@@ -1385,15 +1385,18 @@
return instruction;
}"
[(set_attr "type" "branch")
- ; We use 400/800 instead of 512,1024 to account for inaccurate insn
- ; lengths and insn alignments that are complex to track.
+ ; We use 384/768 instead of 512,1024 to account for inaccurate insn
+ ; lengths and insn alignments that are complex to track. Worst
+ ; case is when every 16-bit instruction is followed by a 32-bit
+ ; instruction, which requires 16 bits of padding for every such
+ ; block.
; It's not important that we be hyper-precise here. It may be more
; important blah blah blah when the chip supports parallel execution
; blah blah blah but until then blah blah blah this is simple and
; suffices.
(set (attr "length") (if_then_else (ltu (plus (minus (match_dup 0) (pc))
- (const_int 400))
- (const_int 800))
+ (const_int 384))
+ (const_int 768))
(const_int 2)
(const_int 4)))])
@@ -1414,15 +1417,15 @@
return instruction;
}"
[(set_attr "type" "branch")
- ; We use 400/800 instead of 512,1024 to account for inaccurate insn
+ ; We use 384/768 instead of 512,1024 to account for inaccurate insn
; lengths and insn alignments that are complex to track.
; It's not important that we be hyper-precise here. It may be more
; important blah blah blah when the chip supports parallel execution
; blah blah blah but until then blah blah blah this is simple and
; suffices.
(set (attr "length") (if_then_else (ltu (plus (minus (match_dup 0) (pc))
- (const_int 400))
- (const_int 800))
+ (const_int 384))
+ (const_int 768))
(const_int 2)
(const_int 4)))])
@@ -1455,11 +1458,11 @@
}
}"
[(set_attr "type" "branch")
- ; We use 25000/50000 instead of 32768/65536 to account for slot filling
+ ; We use 24576/49152 instead of 32768/65536 to account for slot filling
; which is complex to track and inaccurate length specs.
(set (attr "length") (if_then_else (ltu (plus (minus (match_dup 0) (pc))
- (const_int 25000))
- (const_int 50000))
+ (const_int 24576))
+ (const_int 49152))
(const_int 4)
(const_int 8)))])
@@ -1490,11 +1493,11 @@
}
}"
[(set_attr "type" "branch")
- ; We use 25000/50000 instead of 32768/65536 to account for slot filling
+ ; We use 24576/49152 instead of 32768/65536 to account for slot filling
; which is complex to track and inaccurate length specs.
(set (attr "length") (if_then_else (ltu (plus (minus (match_dup 0) (pc))
- (const_int 25000))
- (const_int 50000))
+ (const_int 24576))
+ (const_int 49152))
(const_int 4)
(const_int 8)))])
@@ -1539,11 +1542,11 @@
return \"\";
}"
[(set_attr "type" "branch")
- ; We use 25000/50000 instead of 32768/65536 to account for slot filling
+ ; We use 24576/49152 instead of 32768/65536 to account for slot filling
; which is complex to track and inaccurate length specs.
(set (attr "length") (if_then_else (ltu (plus (minus (match_dup 0) (pc))
- (const_int 25000))
- (const_int 50000))
+ (const_int 24576))
+ (const_int 49152))
(const_int 4)
(const_int 8)))])
@@ -1586,11 +1589,11 @@
return \"\";
}"
[(set_attr "type" "branch")
- ; We use 25000/50000 instead of 32768/65536 to account for slot filling
+ ; We use 24576/49152 instead of 32768/65536 to account for slot filling
; which is complex to track and inaccurate length specs.
(set (attr "length") (if_then_else (ltu (plus (minus (match_dup 0) (pc))
- (const_int 25000))
- (const_int 50000))
+ (const_int 24576))
+ (const_int 49152))
(const_int 4)
(const_int 8)))])
@@ -2263,8 +2266,8 @@
"bra %l0"
[(set_attr "type" "uncond_branch")
(set (attr "length") (if_then_else (ltu (plus (minus (match_dup 0) (pc))
- (const_int 400))
- (const_int 800))
+ (const_int 384))
+ (const_int 768))
(const_int 2)
(const_int 4)))])
--
Alexandre Oliva Enjoy Guarana', see http://www.ic.unicamp.br/~oliva/
Red Hat GCC Developer aoliva@{redhat.com, gcc.gnu.org}
CS PhD student at IC-Unicamp oliva@{lsd.ic.unicamp.br, gnu.org}
Free Software Evangelist Professional serial bug killer