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The following patch affects instruction scheduling and the rs6000 port.
Bootstrap and regression passed on powerpc-apple-darwin6.4.
A detailed description of this patch has been posted here:
http://gcc.gnu.org/ml/gcc/2003-07/msg00485.html.
The idea is to allow scheduling queued instructions directly from the
stalled queue (Q) in order to fill potentially "vacant" dispatch slots with
some "premature" insns when there's nothing better to do (the ready list is
empty); this in turn will result in a schedule that better matches the
groups that are formed by the instruction dispatcher in the processor. The
patch applies to the second invocation of the scheduler, after RA.
Two new flags and a target hook are added to allow tuning this
optimization: An insn is not allowed to leave the Q early and be scheduled
if it is "costly dependent" upon "recently scheduled" insns. A new target
hook 'is_costly_dependence' determines if a dependence is costly. A new
flag '-fsched-stalled-insns-dep' controls which insns are regarded as
recently scheduled. And a new flag '-fsched-stalled-insns' limits the
number of insns that can leave the Q early.
To the rs6000 port we add a definition for the new hook, along with a flag
to tune it (-msched-costly-dep).
ChangeLog entry
---------------
2003-09-10 Dorit Naishlos <dorit@il.ibm.com>
* haifa-sched.c (ok_for_early_schedule): New function.
(early_queue_to_ready): New function.
(schedule_block): allow early removal of insns from Q.
* common.opt (sched_stalled_insns): New flag.
(sched_stalled_insns_dep): New flag.
* flags.h: same above flags.
* opts.c: same as above.
* toplev.c: same as above.
* target.h (targetm.sched.is_costly_dependence): New
hook.
* target-def.h: same as above.
* config/rs6000/rs6000.h: (rs6000_sched_costly_dep):
support new flag -msched-costly-dep.
(DEFAULT_SCHED_COSTLY_DEP): Define.
* config/rs6000/rs6000.c:
(rs6000_is_costly_dependence): New function
(is_load_insn, is_store_insn): New functions
(is_load_insn1, is_store_insn1, is_mem_ref): New
functions
below is the patch, both attached and inlined.
(Also waiting for approval to commit the patch
http://gcc.gnu.org/ml/gcc-patches/2003-09/msg00520.html
"insn priority adjustments in scheduler and rs6000 port")
thanks,
dorit
(See attached file: sched2_patch)
Index: gcc/gcc/common.opt
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/common.opt,v
retrieving revision 1.16
diff -c -3 -p -r1.16 common.opt
*** gcc/gcc/common.opt 3 Sep 2003 20:57:31 -0000 1.16
--- gcc/gcc/common.opt 17 Sep 2003 08:50:02 -0000
*************** fschedule-insns2
*** 592,597 ****
--- 592,613 ----
Common
Reschedule instructions after register allocation
+ fsched-stalled-insns
+ Common
+ Allow premature scheduling of queued insns
+
+ fsched-stalled-insns=
+ Common RejectNegative Joined UInteger
+ -fsched-stalled-insns=<number> Set number of queued insns that can be prematurely scheduled
+
+ fsched-stalled-insns-dep
+ Common
+ Set dependence distance checking in premature scheduling of queued insns
+
+ fsched-stalled-insns-dep=
+ Common RejectNegative Joined UInteger
+ -fsched-stalled-insns-dep=<number> Set dependence distance checking in premature scheduling of queued insns
+
fshared-data
Common
Mark data as shared rather than private
Index: gcc/gcc/flags.h
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/flags.h,v
retrieving revision 1.120
diff -c -3 -p -r1.120 flags.h
*** gcc/gcc/flags.h 3 Sep 2003 20:57:31 -0000 1.120
--- gcc/gcc/flags.h 17 Sep 2003 08:50:02 -0000
*************** extern int flag_schedule_speculative;
*** 439,444 ****
--- 439,458 ----
extern int flag_schedule_speculative_load;
extern int flag_schedule_speculative_load_dangerous;
+ /* The following flags have an effect during scheduling after register
+ allocation:
+
+ sched_stalled_insns means that insns can be moved prematurely from the queue
+ of stalled insns into the ready list.
+
+ sched_stalled_insns_dep controls how many recently scheduled cycles will
+ be examined for a dependency on a stalled insn that is candidate for
+ premature removal from the queue of stalled insns into the ready list (has
+ an effect only if the flag 'sched_stalled_insns' is set). */
+
+ extern int flag_sched_stalled_insns;
+ extern int flag_sched_stalled_insns_dep;
+
/* flag_branch_on_count_reg means try to replace add-1,compare,branch tupple
by a cheaper branch, on a count register. */
extern int flag_branch_on_count_reg;
Index: gcc/gcc/haifa-sched.c
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/haifa-sched.c,v
retrieving revision 1.228
diff -c -3 -p -r1.228 haifa-sched.c
*** gcc/gcc/haifa-sched.c 19 Aug 2003 23:21:59 -0000 1.228
--- gcc/gcc/haifa-sched.c 17 Sep 2003 08:50:02 -0000
*************** static void ready_sort (struct ready_lis
*** 517,522 ****
--- 517,523 ----
static rtx ready_remove_first (struct ready_list *);
static void queue_to_ready (struct ready_list *);
+ static int early_queue_to_ready (state_t, struct ready_list *);
static void debug_ready_list (struct ready_list *);
*************** queue_to_ready (struct ready_list *ready
*** 1809,1814 ****
--- 1810,1963 ----
}
}
+ /* Used by early_queue_to_ready; Determines whether it is "ok" to
+ prematurely move INSN from the queue to the ready list. Currently,
+ if a target defines the hook 'is_costly_dependence', this function
+ uses the hook to check whether there exist any dependences which are
+ considered costly by the target, between INSN and other insns that
+ have already been scheduled. Dependences are checked up to Y cycles
+ back, with default Y=1; The flag -fsched-stalled-insns-dep=Y allows
+ controlling this value.
+ (Other considerations could be taken into account instead (or in
+ addition) depending on user flags and target hooks. */
+
+ static bool
+ ok_for_early_queue_removal (rtx insn)
+ {
+ int n_cycles;
+ rtx prev_insn = last_scheduled_insn;
+
+ if (targetm.sched.is_costly_dependence)
+ {
+ for (n_cycles = flag_sched_stalled_insns_dep; n_cycles; n_cycles--)
+ {
+ for ( ; prev_insn; prev_insn = PREV_INSN (prev_insn))
+ {
+ rtx dep_link = 0;
+ int dep_cost;
+
+ if (GET_CODE (prev_insn) != NOTE)
+ {
+ dep_link = find_insn_list (insn, INSN_DEPEND (prev_insn));
+ if (dep_link)
+ {
+ dep_cost = insn_cost (prev_insn, dep_link, insn) ;
+ if (targetm.sched.is_costly_dependence (prev_insn, insn, dep_link, dep_cost,
+ flag_sched_stalled_insns_dep - n_cycles))
+ return false;
+ }
+ }
+
+ if (GET_MODE (prev_insn) == TImode) /* end of dispatch group */
+ break;
+ }
+
+ if (!prev_insn)
+ break;
+ prev_insn = PREV_INSN (prev_insn);
+ }
+ }
+
+ return true;
+ }
+
+
+ /* Remove insns from the queue, before they become "ready" with respect
+ to FU latency considerations. */
+
+ static int
+ early_queue_to_ready (state_t state, struct ready_list *ready)
+ {
+ rtx insn;
+ rtx link;
+ rtx next_link;
+ rtx prev_link;
+ bool move_to_ready;
+ int cost;
+ state_t temp_state = alloca (dfa_state_size);
+ int stalls;
+ int insns_removed = 0;
+
+ /*
+ flag '-fsched-stalled-insns=X' determines the aggressiveness of this function:
+ X == 0: flag_sched_stalled_insns == -1
+ there is no limit on how many queued insns can be removed prematurely
+ X >= 1: flag_sched_stalled_insns == X
+ only X queued insn can be removed prematurely in each invocation
+ Otherwise: flag_sched_stalled_insns == 0
+ early queue removal is disabled
+ */
+
+ if (! flag_sched_stalled_insns)
+ return 0;
+
+ for (stalls = 0; stalls <= MAX_INSN_QUEUE_INDEX; stalls++)
+ {
+ if ((link = insn_queue[NEXT_Q_AFTER (q_ptr, stalls)]))
+ {
+ if (sched_verbose > 6)
+ fprintf (sched_dump, ";; look at index %d + %d\n", q_ptr, stalls);
+
+ prev_link = 0;
+ while (link)
+ {
+ next_link = XEXP (link, 1);
+ insn = XEXP (link, 0);
+ if (insn && sched_verbose > 6)
+ print_rtl_single (sched_dump, insn);
+
+ memcpy (temp_state, state, dfa_state_size);
+ if (recog_memoized (insn) < 0)
+ /* non-negative to indicate that it's not ready
+ to avoid infinite Q->R->Q->R... */
+ cost = 0;
+ else
+ cost = state_transition (temp_state, insn);
+
+ if (sched_verbose >= 6)
+ fprintf (sched_dump, "transition cost = %d\n", cost);
+
+ move_to_ready = false;
+ if (cost < 0)
+ {
+ move_to_ready = ok_for_early_queue_removal (insn);
+ if (move_to_ready == true)
+ {
+ /* move from Q to R */
+ q_size -= 1;
+ ready_add (ready, insn);
+
+ if (prev_link)
+ XEXP (prev_link, 1) = next_link;
+ else
+ insn_queue[NEXT_Q_AFTER (q_ptr, stalls)] = next_link;
+
+ free_INSN_LIST_node (link);
+
+ if (sched_verbose >= 2)
+ fprintf (sched_dump, ";;\t\tEarly Q-->Ready: insn %s\n",
+ (*current_sched_info->print_insn) (insn, 0));
+
+ insns_removed++;
+ if (insns_removed == flag_sched_stalled_insns)
+ /* remove only one insn from Q at a time */
+ return insns_removed;
+ }
+ }
+
+ if (move_to_ready == false)
+ prev_link = link;
+
+ link = next_link;
+ } /* while link */
+ } /* if link */
+
+ } /* for stalls.. */
+
+ return insns_removed;
+ }
+
+
/* Print the ready list for debugging purposes. Callable from debugger. */
static void
*************** schedule_block (int b, int rgn_n_insns)
*** 2251,2256 ****
--- 2400,2419 ----
}
else
{
+ if (ready.n_ready == 0
+ && can_issue_more
+ && reload_completed)
+ {
+ /* Allow scheduling insns directly from the queue in case
+ there's nothing better to do (ready list is empty) but
+ there are still vacant dispatch slots in the current cycle */
+ if (sched_verbose >= 6)
+ fprintf(sched_dump,";;\t\tSecond chance\n");
+ memcpy (temp_state, curr_state, dfa_state_size);
+ if (early_queue_to_ready(temp_state, &ready))
+ ready_sort (&ready);
+ }
+
if (ready.n_ready == 0 || !can_issue_more
|| state_dead_lock_p (curr_state)
|| !(*current_sched_info->schedule_more_p) ())
Index: gcc/gcc/opts.c
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/opts.c,v
retrieving revision 1.38
diff -c -3 -p -r1.38 opts.c
*** gcc/gcc/opts.c 5 Sep 2003 05:36:47 -0000 1.38
--- gcc/gcc/opts.c 17 Sep 2003 08:50:03 -0000
*************** common_handle_option (size_t scode, cons
*** 1264,1269 ****
--- 1264,1287 ----
flag_schedule_insns_after_reload = value;
break;
+ case OPT_fsched_stalled_insns:
+ flag_sched_stalled_insns = value;
+ break;
+
+ case OPT_fsched_stalled_insns_:
+ flag_sched_stalled_insns = value;
+ if (flag_sched_stalled_insns == 0)
+ flag_sched_stalled_insns = -1;
+ break;
+
+ case OPT_fsched_stalled_insns_dep:
+ flag_sched_stalled_insns_dep = 1;
+ break;
+
+ case OPT_fsched_stalled_insns_dep_:
+ flag_sched_stalled_insns_dep = value;
+ break;
+
case OPT_fshared_data:
flag_shared_data = value;
break;
Index: gcc/gcc/target-def.h
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/target-def.h,v
retrieving revision 1.55
diff -c -3 -p -r1.55 target-def.h
*** gcc/gcc/target-def.h 4 Sep 2003 03:17:51 -0000 1.55
--- gcc/gcc/target-def.h 17 Sep 2003 08:50:03 -0000
*************** Foundation, 59 Temple Place - Suite 330,
*** 225,230 ****
--- 225,231 ----
#define TARGET_SCHED_DFA_NEW_CYCLE 0
#define TARGET_SCHED_INIT_DFA_BUBBLES 0
#define TARGET_SCHED_DFA_BUBBLE 0
+ #define TARGET_SCHED_IS_COSTLY_DEPENDENCE 0
#define TARGET_SCHED \
{TARGET_SCHED_ADJUST_COST, \
*************** Foundation, 59 Temple Place - Suite 330,
*** 245,251 ****
TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD, \
TARGET_SCHED_DFA_NEW_CYCLE, \
TARGET_SCHED_INIT_DFA_BUBBLES, \
! TARGET_SCHED_DFA_BUBBLE}
/* In tree.c. */
#define TARGET_MERGE_DECL_ATTRIBUTES merge_decl_attributes
--- 246,253 ----
TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD, \
TARGET_SCHED_DFA_NEW_CYCLE, \
TARGET_SCHED_INIT_DFA_BUBBLES, \
! TARGET_SCHED_DFA_BUBBLE, \
! TARGET_SCHED_IS_COSTLY_DEPENDENCE}
/* In tree.c. */
#define TARGET_MERGE_DECL_ATTRIBUTES merge_decl_attributes
Index: gcc/gcc/target.h
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/target.h,v
retrieving revision 1.62
diff -c -3 -p -r1.62 target.h
*** gcc/gcc/target.h 4 Sep 2003 03:17:51 -0000 1.62
--- gcc/gcc/target.h 17 Sep 2003 08:50:03 -0000
*************** struct gcc_target
*** 247,252 ****
--- 247,264 ----
scheduling. */
void (* init_dfa_bubbles) (void);
rtx (* dfa_bubble) (int);
+ /* The following member value is a pointer to a function called
+ by the insn scheduler. It should return 1 if there exists a
+ dependence which is considered costly by the target, between
+ the insn passed as the first parameter, and the insn passed as
+ the second parameter. The third parameter is the INSN_DEPEND
+ link that represents the dependence between the two insns. The
+ fourth argument is the cost of the dependence as estimated by
+ the scheduler. The last argument is the distance in cycles
+ between the already scheduled insn (first parameter) and the
+ the second insn (second parameter).
+ */
+ bool (* is_costly_dependence) PARAMS ((rtx, rtx, rtx, int, int));
} sched;
/* Given two decls, merge their attributes and return the result. */
Index: gcc/gcc/toplev.c
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/toplev.c,v
retrieving revision 1.824
diff -c -3 -p -r1.824 toplev.c
*** gcc/gcc/toplev.c 7 Sep 2003 11:59:52 -0000 1.824
--- gcc/gcc/toplev.c 17 Sep 2003 08:50:04 -0000
*************** int flag_schedule_speculative = 1;
*** 826,831 ****
--- 826,845 ----
int flag_schedule_speculative_load = 0;
int flag_schedule_speculative_load_dangerous = 0;
+ /* The following flags have an effect during scheduling after register
+ allocation:
+
+ flag_sched_stalled_insns means that insns can be moved prematurely from the queue
+ of stalled insns into the ready list.
+
+ flag_sched_stalled_insns_dep controls how many insn groups will be examined
+ for a dependency on a stalled insn that is candidate for premature removal
+ from the queue of stalled insns into the ready list (has an effect only if
+ the flag 'sched_satlled_insns' is set). */
+
+ int flag_sched_stalled_insns = 0;
+ int flag_sched_stalled_insns_dep = 1;
+
int flag_single_precision_constant;
/* flag_branch_on_count_reg means try to replace add-1,compare,branch tupple
*************** static const lang_independent_options f_
*** 1066,1071 ****
--- 1080,1087 ----
{"sched-spec",&flag_schedule_speculative, 1 },
{"sched-spec-load",&flag_schedule_speculative_load, 1 },
{"sched-spec-load-dangerous",&flag_schedule_speculative_load_dangerous, 1 },
+ {"sched-stalled-insns", &flag_sched_stalled_insns, 0 },
+ {"sched-stalled-insns-dep", &flag_sched_stalled_insns_dep, 1 },
{"sched2-use-superblocks", &flag_sched2_use_superblocks, 1 },
{"sched2-use-traces", &flag_sched2_use_traces, 1 },
{"branch-count-reg",&flag_branch_on_count_reg, 1 },
Index: gcc/gcc/config/rs6000/rs6000.c
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.512
diff -c -3 -p -r1.512 rs6000.c
*** gcc/gcc/config/rs6000/rs6000.c 4 Sep 2003 03:17:58 -0000 1.512
--- gcc/gcc/config/rs6000/rs6000.c 17 Sep 2003 08:50:08 -0000
*************** struct rs6000_cpu_select rs6000_select[3
*** 80,85 ****
--- 80,89 ----
{ (const char *)0, "-mtune=", 1, 0 },
};
+ /* Support for -msched-costly-dep option */
+ const char *rs6000_sched_costly_dep_str;
+ int rs6000_sched_costly_dep;
+
/* Size of long double */
const char *rs6000_long_double_size_string;
int rs6000_long_double_type_size;
*************** static int rs6000_adjust_cost PARAMS ((r
*** 276,281 ****
--- 280,286 ----
static int rs6000_adjust_priority PARAMS ((rtx, int));
static int rs6000_issue_rate PARAMS ((void));
static int rs6000_use_sched_lookahead PARAMS ((void));
+ static bool rs6000_is_costly_dependence PARAMS((rtx, rtx, rtx, int, int));
static void rs6000_init_builtins PARAMS ((void));
static rtx rs6000_expand_unop_builtin PARAMS ((enum insn_code, tree, rtx));
*************** static const char alt_reg_names[][8] =
*** 460,465 ****
--- 465,472 ----
#define TARGET_SCHED_ADJUST_COST rs6000_adjust_cost
#undef TARGET_SCHED_ADJUST_PRIORITY
#define TARGET_SCHED_ADJUST_PRIORITY rs6000_adjust_priority
+ #undef TARGET_SCHED_IS_COSTLY_DEPENDENCE
+ #define TARGET_SCHED_IS_COSTLY_DEPENDENCE rs6000_is_costly_dependence
#undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD rs6000_use_sched_lookahead
*************** rs6000_override_options (default_cpu)
*** 824,829 ****
--- 831,841 ----
rs6000_default_long_calls = (base[0] != 'n');
}
+ /* Handle -msched-costly-dep option */
+ rs6000_sched_costly_dep = DEFAULT_SCHED_COSTLY_DEP;
+ if (rs6000_sched_costly_dep_str)
+ rs6000_sched_costly_dep = atoi (rs6000_sched_costly_dep_str);
+
#ifdef TARGET_REGNAMES
/* If the user desires alternate register names, copy in the
alternate names now. */
*************** rs6000_use_sched_lookahead ()
*** 13440,13445 ****
--- 13452,13594 ----
return 4;
return 0;
}
+
+ /* determine is PAT refers to memory */
+
+ static bool
+ is_mem_ref (rtx pat)
+ {
+ const char * fmt;
+ int i, j;
+ bool ret = false;
+
+ if (GET_CODE (pat) == MEM)
+ return true;
+
+ /* Recursively process the pattern. */
+ fmt = GET_RTX_FORMAT (GET_CODE (pat));
+
+ for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0 && !ret; i--)
+ {
+ if (fmt[i] == 'e')
+ ret |= is_mem_ref (XEXP (pat, i));
+ else if (fmt[i] == 'E')
+ for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
+ ret |= is_mem_ref (XVECEXP (pat, i, j));
+ }
+
+ return ret;
+ }
+
+ /* determine if PAT is a PATTERN of a load insn */
+
+ static bool
+ is_load_insn1 (rtx pat)
+ {
+ if (!pat || pat == NULL_RTX)
+ return false;
+
+ if (GET_CODE (pat) == SET)
+ return is_mem_ref(SET_SRC (pat));
+
+ if (GET_CODE (pat) == PARALLEL)
+ {
+ int i;
+ for (i = 0; i < XVECLEN (pat, 0); i++)
+ if (is_load_insn1 (XVECEXP (pat, 0, i)))
+ return true;
+ }
+
+ return false;
+ }
+
+ static bool
+ is_load_insn (rtx insn)
+ {
+ if (!insn || !INSN_P (insn))
+ return false;
+
+ if (GET_CODE (insn) == CALL_INSN)
+ return false;
+
+ return is_load_insn1 (PATTERN (insn));
+ }
+
+ /* determine if PAT is a PATTERN of a store insn */
+
+ static bool
+ is_store_insn1 (rtx pat)
+ {
+ if (!pat || pat == NULL_RTX)
+ return false;
+
+ if (GET_CODE (pat) == SET)
+ return is_mem_ref(SET_DEST (pat));
+
+ if (GET_CODE (pat) == PARALLEL)
+ {
+ int i;
+ for (i = 0; i < XVECLEN (pat, 0); i++)
+ if (is_store_insn1 (XVECEXP (pat, 0, i)))
+ return true;
+ }
+
+ return false;
+ }
+
+ static bool
+ is_store_insn (rtx insn)
+ {
+ if (!insn || !INSN_P (insn))
+ return false;
+
+ return is_store_insn1 (PATTERN (insn));
+ }
+
+ /* Returns whether the dependence between INSN and NEXT is considered
+ costly by the given target */
+
+ static bool
+ rs6000_is_costly_dependence (insn, next, link, cost, distance)
+ rtx insn, next, link;
+ int cost, distance;
+ {
+ /* If the flag is not enbled - no dependence is considered costly;
+ allow all dependences in the same group.
+ This is the most aggressive option */
+ if (! rs6000_sched_costly_dep)
+ return false;
+
+ /* If the flag is set to 1 - a dependence is always considered costly;
+ do not allow dependent instructions in the same group.
+ This is the most conservative option */
+ if (rs6000_sched_costly_dep == 1)
+ return true;
+
+ /* load-after-store may be considered costly */
+ if (is_load_insn(next) && is_store_insn(insn))
+ {
+ if (rs6000_sched_costly_dep >= 3)
+ /* prevent load after store in the same group */
+ return true;
+ else if (rs6000_sched_costly_dep == 2
+ && (!link || (int) REG_NOTE_KIND (link) == 0))
+ /* prevent load after store in the same group if it is a true dependence */
+ return true;
+ else
+ return false;
+ }
+
+ /* If the flag is set to X >= 4 -
+ then dependences with latency >= X are considered costly, and will
+ not be scheduled in the same group */
+ if (rs6000_sched_costly_dep >= 4
+ && ((cost - distance) >= rs6000_sched_costly_dep))
+ return true;
+
+ return false;
+ }
+
/* Length in units of the trampoline for entering a nested function. */
Index: gcc/gcc/config/rs6000/rs6000.h
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/config/rs6000/rs6000.h,v
retrieving revision 1.286
diff -c -3 -p -r1.286 rs6000.h
*** gcc/gcc/config/rs6000/rs6000.h 21 Jul 2003 20:18:52 -0000 1.286
--- gcc/gcc/config/rs6000/rs6000.h 17 Sep 2003 08:50:09 -0000
*************** extern enum processor_type rs6000_cpu;
*** 402,407 ****
--- 402,409 ----
{"longcall", &rs6000_longcall_switch, \
N_("Avoid all range limits on call instructions"), 0}, \
{"no-longcall", &rs6000_longcall_switch, "", 0}, \
+ {"sched-costly-dep=", &rs6000_sched_costly_dep_str, \
+ N_("determine which dependences between insns are considered costly"), 0}, \
{"align-", &rs6000_alignment_string, \
N_("Specify alignment of structure fields default/natural"), 0}, \
SUBTARGET_OPTIONS \
*************** extern const char *rs6000_longcall_switc
*** 457,462 ****
--- 459,467 ----
extern int rs6000_default_long_calls;
extern const char* rs6000_alignment_string;
extern int rs6000_alignment_flags;
+ extern const char *rs6000_sched_costly_dep_str;
+ extern int rs6000_sched_costly_dep;
+
/* Alignment options for fields in structures for sub-targets following
AIX-like ABI.
*************** extern int rs6000_alignment_flags;
*** 474,479 ****
--- 479,486 ----
#else
#define TARGET_ALIGN_NATURAL 0
#endif
+
+ #define DEFAULT_SCHED_COSTLY_DEP (rs6000_cpu == PROCESSOR_POWER4 ? 2 : 0)
/* Define TARGET_MFCRF if the target assembler supports the optional
field operand for mfcr and the target processor supports the
Attachment:
sched2_patch
Description: Binary data
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