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[patch] doc and config: Follow spelling conventions.


Hi,

Attached is a patch to follow spelling conventions.

Committed as obvious.

Kazu Hirata

2003-06-14  Kazu Hirata  <kazu@cs.umass.edu>

	* doc/install.texi: Follow spelling conventions.
	* doc/tm.texi: Likewise.
	* config/fp-bit.c: Likewise.
	* config/arm/arm.c: Likewise.
	* config/frv/frv.c: Likewise.
	* config/ns32k/NOTES: Likewise.
	* config/ns32k/STATUS: Likewise.

Index: doc/install.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/install.texi,v
retrieving revision 1.201
diff -u -r1.201 install.texi
--- doc/install.texi	14 Jun 2003 11:15:49 -0000	1.201
+++ doc/install.texi	15 Jun 2003 03:56:37 -0000
@@ -2557,7 +2557,7 @@
 the "Execution Environment Update", provides updated link editors and
 assemblers, as well as updated standard C and math libraries.  The C
 startup modules are also updated to support the System V gABI draft, and
-GCC relies on that behaviour.  OSS631 provides a collection of commonly
+GCC relies on that behavior.  OSS631 provides a collection of commonly
 used open source libraries, some of which GCC depends on (such as GNU
 gettext and zlib).  SCO OpenServer Release 5.0.7 has all of this built
 in by default, but OSS631C and later also apply to that release.  Please
Index: doc/tm.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/tm.texi,v
retrieving revision 1.232
diff -u -r1.232 tm.texi
--- doc/tm.texi	14 Jun 2003 21:47:45 -0000	1.232
+++ doc/tm.texi	15 Jun 2003 03:56:46 -0000
@@ -2840,9 +2840,9 @@
 @findex STACK_ALIGNMENT_NEEDED
 @item STACK_ALIGNMENT_NEEDED
 Define to zero to disable final alignment of the stack during reload.
-The non-zero default for this macro is suitable for most ports.
+The nonzero default for this macro is suitable for most ports.
 
-On ports where @code{STARTING_FRAME_OFFSET} is non-zero or where there
+On ports where @code{STARTING_FRAME_OFFSET} is nonzero or where there
 is a register save block following the local block that doesn't require
 alignment to @code{STACK_BOUNDARY}, it may be beneficial to disable
 stack alignment and do it in the backend.
Index: config/fp-bit.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/fp-bit.c,v
retrieving revision 1.41
diff -u -r1.41 fp-bit.c
--- config/fp-bit.c	9 Apr 2003 19:30:29 -0000	1.41
+++ config/fp-bit.c	15 Jun 2003 03:56:46 -0000
@@ -371,7 +371,7 @@
 	       if (low >= ((halffractype)1 << HALFFRACBITS))
 		 /* We don't shift left, since it has just become the
 		    smallest normal number, whose implicit 1 bit is
-		    now indicated by the non-zero exponent.  */
+		    now indicated by the nonzero exponent.  */
 		 exp++;
 	     }
 	 }
Index: config/arm/arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.281
diff -u -r1.281 arm.c
--- config/arm/arm.c	14 Jun 2003 14:16:39 -0000	1.281
+++ config/arm/arm.c	15 Jun 2003 03:56:51 -0000
@@ -2350,7 +2350,7 @@
 
 /* Addressing mode support functions.  */
 
-/* Return non-zero if X is a legitimate immediate operand when compiling
+/* Return nonzero if X is a legitimate immediate operand when compiling
    for PIC.  */
 int
 legitimate_pic_operand_p (rtx x)
Index: config/frv/frv.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/frv/frv.c,v
retrieving revision 1.24
diff -u -r1.24 frv.c
--- config/frv/frv.c	19 May 2003 00:31:08 -0000	1.24
+++ config/frv/frv.c	15 Jun 2003 03:56:54 -0000
@@ -2338,8 +2338,8 @@
 
      Printable instructions will be asm_operands or match one of the .md
      patterns.  Since asm instructions cannot be packed -- and will
-     therefore have TImode -- this loop terminates on any recognisable
-     instruction, and on any unrecognisable instruction with TImode.  */
+     therefore have TImode -- this loop terminates on any recognizable
+     instruction, and on any unrecognizable instruction with TImode.  */
   for (insn = NEXT_INSN (insn); insn; insn = NEXT_INSN (insn))
     {
       if (NOTE_P (insn))
Index: config/ns32k/NOTES
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ns32k/NOTES,v
retrieving revision 1.1
diff -u -r1.1 NOTES
--- config/ns32k/NOTES	20 Dec 2002 18:14:18 -0000	1.1
+++ config/ns32k/NOTES	15 Jun 2003 03:56:54 -0000
@@ -10,7 +10,7 @@
 ------------------------------------
 
 The ns32x81 fpu handles most operands in hardware, but traps on NaN,
-Inf and Denormalized numbers. The correct behaviour can be handled by
+Inf and Denormalized numbers. The correct behavior can be handled by
 the trap handler. This is mostly transparent to the compiler, but in
 the case of floating point comparisions, the trap handler and the
 compiler must co-operate.
Index: config/ns32k/STATUS
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ns32k/STATUS,v
retrieving revision 1.1
diff -u -r1.1 STATUS
--- config/ns32k/STATUS	20 Dec 2002 18:14:18 -0000	1.1
+++ config/ns32k/STATUS	15 Jun 2003 03:56:54 -0000
@@ -28,7 +28,7 @@
 gcc.dg/debug/debug-1.c scan-assembler xyzzy:
 At -O3 level of optimization, variable xyzzy gets eliminated. Isn't it
 reasonable that the debugging info is gone too? Indeed, the
-documentation says this is expected behaviour.
+documentation says this is expected behavior.
 
 gcc.dg/debug/debug-2.c scan-assembler xyzzy:
 As for the above.
@@ -61,7 +61,7 @@
 Bogus warnings, almost certainly not backend.
 
 gcc.dg/special/weak-1.c execution test
-X  This fails for i386 too. I don't understand what the correct behaviour
+X  This fails for i386 too. I don't understand what the correct behavior
 for this test is.
 
 gcc.dg/special/gcsec-1.c (test for excess errors)


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