This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: post-reload crossjump tweak


> This causes problems with a patch I'm working on for ia64
> that represents symbol address loads with just symbol_ref
> before reload.  Post-reload, we split them into their
> constituent instructions.  Problem is, crossjumping was
> undoing this split, resulting in aborts.
> 
> 
> 
> r~
> 
> 
>         * cfgcleanup.c (insns_match_p): Do not do EQUIV substitution
>         after reload.
> 
> Index: cfgcleanup.c
> ===================================================================
> RCS file: /cvs/gcc/gcc/gcc/cfgcleanup.c,v
> retrieving revision 1.78
> diff -u -p -r1.78 cfgcleanup.c
> --- cfgcleanup.c	15 Mar 2003 22:51:32 -0000	1.78
> +++ cfgcleanup.c	23 Mar 2003 01:38:20 -0000
> @@ -967,7 +967,15 @@ insns_match_p (mode, i1, i2)
>  #endif
>  
>    if (reload_completed
> -      ? ! rtx_renumbered_equal_p (p1, p2) : ! rtx_equal_p (p1, p2))
> +      ? rtx_renumbered_equal_p (p1, p2) : rtx_equal_p (p1, p2))
> +    return true;
> +
> +  /* Do not do EQUIV substitution after reload.  First, we're undoing the
> +     work of reload_cse.  Second, we may be undoing the work of the post-
> +     reload splitting pass.  */
> +  /* ??? Possibly add a new phase switch variable that can be used by
> +     targets to disallow the troublesome insns after splitting.  */

What about dropping that hunk entirely?  We don't crossjump before
reload at all at the moment (I did some experiments with that and it
works, but I hoped that code unification of GCSE will obsolette that but
my code motion patches got suck.  I will try to update these)

Anyway that hunk of code is redundant with other passes and do not
belong to crossjumping.

I never understood really why that hunk is needed at all.  It appears to
shoot for some sequences that originally comes from different pseudos
and may be register allocated differently.  But even when you unify the
last instruction in question the other (initializing the register) won't
match, so it should be quite useless.

Honza
> +  if (!reload_completed)
>      {
>        /* The following code helps take care of G++ cleanups.  */
>        rtx equiv1 = find_reg_equal_equiv_note (i1);
> @@ -994,11 +1002,9 @@ insns_match_p (mode, i1, i2)
>  		return true;
>  	    }
>  	}
> -
> -      return false;
>      }
>  
> -  return true;
> +  return false;
>  }
>  
>  /* Look through the insns at the end of BB1 and BB2 and find the longest


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]