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[patch] h8300.md: Add a new peephole2.


Hi,

Attached is a patch to add a new peephole2.

The new peephole2 transforms

	cmp.l	#1,er0
	bhi	.L1

into

	shlr.l	er0
	bne	.L1

saving 4 bytes.  Similar transformation is done for "cmp.l #2,er0" on
H8S because H8S has 2-bit shift instructions.  Also, the reversed
branch condition is handled.

Tested on h8300 port.  Committed.

Kazu Hirata

2003-03-31  Kazu Hirata  <kazu at cs dot umass dot edu>

	* config/h8300/h8300.md (a peephole2): New.

Index: h8300.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.md,v
retrieving revision 1.208
diff -u -r1.208 h8300.md
--- h8300.md	31 Mar 2003 14:44:12 -0000	1.208
+++ h8300.md	31 Mar 2003 15:30:50 -0000
@@ -4101,8 +4101,10 @@
 ;; dead 0xffffff?? except -1 and -2 eq/ne   xor.b and not.l
 ;; dead 0xffff??ff                  eq/ne   xor.b and not.l
 ;;
-;; dead     1                       geu/ltu and.b and test
-;; dead     3                       geu/ltu and.b and test
+;; dead     1                       geu/ltu shlr.l
+;; dead     3 (H8S)                 geu/ltu shlr.l
+;;
+;; dead     3 (H8/300H)             geu/ltu and.b and test
 ;; dead     7                       geu/ltu and.b and test
 ;; dead    15                       geu/ltu and.b and test
 ;; dead    31                       geu/ltu and.b and test
@@ -4222,6 +4224,44 @@
 		      (label_ref (match_dup 2))
 		      (pc)))]
   "operands[4] = GEN_INT (INTVAL (operands[1]) ^ -1);")
+
+;; Transform
+;;
+;;	cmp.l	#1,er0
+;;	bhi	.L1
+;;
+;; into
+;;
+;;	shlr.l	er0
+;;	bne	.L1
+
+(define_peephole2
+  [(set (cc0)
+	(compare (match_operand:SI 0 "register_operand" "")
+		 (match_operand:SI 1 "const_int_operand" "")))
+   (set (pc)
+	(if_then_else (match_operator 2 "gtuleu_operator"
+			[(cc0) (const_int 0)])
+		      (label_ref (match_operand 3 "" ""))
+		      (pc)))]
+  "(TARGET_H8300H || TARGET_H8300S)
+   && peep2_reg_dead_p (1, operands[0])
+   && (INTVAL (operands[1]) == 1
+	|| (TARGET_H8300S && INTVAL (operands[1]) == 3))"
+  [(parallel [(set (match_dup 0)
+		   (lshiftrt:SI (match_dup 0)
+				(match_dup 5)))
+	      (clobber (scratch:QI))])
+   (set (cc0)
+	(match_dup 0))
+   (set (pc)
+	(if_then_else (match_dup 4)
+		      (label_ref (match_dup 3))
+		      (pc)))]
+  "operands[4] = ((GET_CODE (operands[2]) == GTU) ?
+		  gen_rtx_NE (VOIDmode, cc0_rtx, const0_rtx) :
+		  gen_rtx_EQ (VOIDmode, cc0_rtx, const0_rtx));
+   operands[5] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));")
 
 ;; Transform A <= 1 to (A & 0xfffffffe) == 0.
 


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