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Re: patch applied to sh port: fix alignments / insn length problem
- From: Joern Rennecke <joern dot rennecke at superh dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Wed, 05 Mar 2003 21:49:50 +0000
- Subject: Re: patch applied to sh port: fix alignments / insn length problem
- Organization: SuperH UK Ltd.
- References: <3E63B399.36731C6E@superh.com>
> Mon Mar 3 19:47:26 2003 J"orn Rennecke <joern dot rennecke at superh dot com>
>
> * sh.h (OVERRIDE_OPTIONS): Set default values for align_loops
> and align_jumps if not set.
> Force align_jumps to be at least 2.
Well, SHmedia needs 4...
SECONDARY_INPUT_RELOAD_CLASS also wasn't quite prepared for the bad taste
of the register allocator to load a PLUS into FPUL.
Tested for sh-elf and sh64-elf.
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Wed Mar 5 21:40:57 2003 J"orn Rennecke <joern dot rennecke at superh dot com>
* sh.h (OVERRIDE_OPTIONS): For TARGET_SHMEDIA, the minimum value
for align_jumps is 4.
(SECONDARY_INPUT_RELOAD_CLASS): If reloading a PLUS into FPUL,
use GENERAL_REGS.
Index: config/sh/sh.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.h,v
retrieving revision 1.193
diff -p -r1.193 sh.h
*** config/sh/sh.h 3 Mar 2003 20:57:17 -0000 1.193
--- config/sh/sh.h 5 Mar 2003 21:44:05 -0000
*************** do { \
*** 507,514 ****
align_loops = 1 << (TARGET_SH5 ? 3 : 2); \
if (align_jumps == 0) \
align_jumps = 1 << CACHE_LOG; \
! else if (align_jumps <= 1) \
! align_jumps = 2; \
\
/* Allocation boundary (in *bytes*) for the code of a function. \
SH1: 32 bit alignment is faster, because instructions are always \
--- 507,514 ----
align_loops = 1 << (TARGET_SH5 ? 3 : 2); \
if (align_jumps == 0) \
align_jumps = 1 << CACHE_LOG; \
! else if (align_jumps < (TARGET_SHMEDIA ? 4 : 2)) \
! align_jumps = TARGET_SHMEDIA ? 4 : 2; \
\
/* Allocation boundary (in *bytes*) for the code of a function. \
SH1: 32 bit alignment is faster, because instructions are always \
*************** extern enum reg_class reg_class_from_let
*** 1395,1402 ****
? R0_REGS \
: (CLASS == FPUL_REGS \
&& ((GET_CODE (X) == REG \
! && (REGNO (X) == MACL_REG || REGNO (X) == MACH_REG \
! || REGNO (X) == T_REG)))) \
? GENERAL_REGS \
: CLASS == FPUL_REGS && immediate_operand ((X), (MODE)) \
? (GET_CODE (X) == CONST_INT && CONST_OK_FOR_I (INTVAL (X)) \
--- 1395,1403 ----
? R0_REGS \
: (CLASS == FPUL_REGS \
&& ((GET_CODE (X) == REG \
! && (REGNO (X) == MACL_REG || REGNO (X) == MACH_REG \
! || REGNO (X) == T_REG)) \
! || GET_CODE (X) == PLUS)) \
? GENERAL_REGS \
: CLASS == FPUL_REGS && immediate_operand ((X), (MODE)) \
? (GET_CODE (X) == CONST_INT && CONST_OK_FOR_I (INTVAL (X)) \