ia64 ldxmov support

[Richard Henderson <rth at redhat dot com>]

This allows the linker to reduce the size of the got a bit,
and replace a load with a move.   For cc1 itself, this is
worth a 6k savings in the size of the got.


r~


        * configure.in (HAVE_AS_LTOFFX_LDXMOV_RELOCS): New ia64 test.
        * config.in, configure: Rebuild.
        * config/ia64/ia64.c (ia64_ld_address_bypass_p): Accept lo_sum.
        * config/ia64/ia64.md (load_symptr): Use high/lo_sum for the 
        paired ldtoffx and ldxmov annotations.
        (load_symptr_internal1): Remove.
        (load_symptr_high, load_symptr_low): New.

Index: gcc/configure.in
===================================================================
RCS file: /cvs/gcc/gcc/gcc/configure.in,v
retrieving revision 1.644
diff -u -p -r1.644 configure.in
--- gcc/configure.in	20 Feb 2003 23:38:06 -0000	1.644
+++ gcc/configure.in	2 Mar 2003 22:10:35 -0000
@@ -2233,6 +2233,41 @@ EOF
       [Define true if the assembler supports '.long foo at GOTOFF'.])
     AC_MSG_RESULT($gcc_cv_as_gotoff_in_data)
     ;;
+
+  ia64*-*-*)
+    AC_CACHE_CHECK([assembler supports ltoffx and ldxmov],
+	gcc_cv_as_ltoffx_ldxmov_relocs, [
+	gcc_cv_as_ltoffx_ldxmov_relocs=unknown
+	if test x$gcc_cv_gas_major_version != x \
+		-a x$gcc_cv_gas_minor_version != x
+	then
+	   if test "$gcc_cv_gas_major_version" -eq 2 \
+	           -a "$gcc_cv_gas_minor_version" -ge 14 \
+	           -o "$gcc_cv_gas_major_version" -gt 2; then
+	      gcc_cv_as_ltoffx_ldxmov_relocs=yes
+	   fi
+	elif test x$gcc_cv_as != x; then
+	    cat > conftest.s << 'EOF'
+changequote(,)dnl
+	.text
+	addl r15 = @ltoffx(x#), gp
+	;;
+	ld8.mov r16 = [r15], x#
+EOF
+changequote([,])dnl
+	    if $gcc_cv_as -o conftest.o conftest.s > /dev/null 2>&1; then
+		gcc_cv_as_ltoffx_ldxmov_relocs=yes
+	    else
+		gcc_cv_as_ltoffx_ldxmov_relocs=no
+	    fi
+	    rm -f conftest.s conftest.o
+	fi
+    ])
+    if test "x$gcc_cv_as_ltoffx_ldxmov_relocs" = xyes; then
+	AC_DEFINE(HAVE_AS_LTOFFX_LDXMOV_RELOCS, 1,
+	  [Define if your assembler supports ltoffx and ldxmov relocations.])
+    fi
+    ;;
 esac
 
 AC_MSG_CHECKING(assembler dwarf2 debug_line support)
Index: gcc/config/ia64/ia64.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ia64/ia64.c,v
retrieving revision 1.208
diff -u -p -r1.208 ia64.c
--- gcc/config/ia64/ia64.c	5 Feb 2003 02:25:36 -0000	1.208
+++ gcc/config/ia64/ia64.c	2 Mar 2003 22:10:35 -0000
@@ -7012,8 +7012,11 @@ ia64_ld_address_bypass_p (producer, cons
     mem = XVECEXP (mem, 0, 0);
   while (GET_CODE (mem) == SUBREG || GET_CODE (mem) == ZERO_EXTEND)
     mem = XEXP (mem, 0);
-  if (GET_CODE (mem) != MEM)
+
+  /* Note that LO_SUM is used for GOT loads.  */
+  if (GET_CODE (mem) != LO_SUM && GET_CODE (mem) != MEM)
     abort ();
+
   return reg_mentioned_p (reg, mem);
 }
 
Index: gcc/config/ia64/ia64.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ia64/ia64.md,v
retrieving revision 1.97
diff -u -p -r1.97 ia64.md
--- gcc/config/ia64/ia64.md	18 Feb 2003 20:12:11 -0000	1.97
+++ gcc/config/ia64/ia64.md	2 Mar 2003 22:10:35 -0000
@@ -457,21 +457,40 @@
 
 (define_expand "load_symptr"
   [(set (match_operand:DI 2 "register_operand" "")
-	(plus:DI (match_dup 4) (match_operand:DI 1 "got_symbolic_operand" "")))
-   (set (match_operand:DI 0 "register_operand" "") (match_dup 3))]
+	(plus:DI (high:DI (match_operand:DI 1 "got_symbolic_operand" ""))
+		 (match_dup 3)))
+   (set (match_operand:DI 0 "register_operand" "")
+	(lo_sum:DI (match_dup 2) (match_dup 1)))]
   ""
 {
-  operands[3] = gen_rtx_MEM (DImode, operands[2]);
-  operands[4] = pic_offset_table_rtx;
-  RTX_UNCHANGING_P (operands[3]) = 1;
+  operands[3] = pic_offset_table_rtx;
 })
 
-(define_insn "*load_symptr_internal1"
+(define_insn "*load_symptr_high"
   [(set (match_operand:DI 0 "register_operand" "=r")
-	(plus:DI (reg:DI 1) (match_operand 1 "got_symbolic_operand" "s")))]
+	(plus:DI (high:DI (match_operand 1 "got_symbolic_operand" "s"))
+		 (match_operand:DI 2 "register_operand" "a")))]
   ""
-  "addl %0 = @ltoff(%1), gp"
+{
+  if (HAVE_AS_LTOFFX_LDXMOV_RELOCS)
+    return "%,addl %0 = @ltoffx(%1), %2";
+  else
+    return "%,addl %0 = @ltoff(%1), %2";
+}
   [(set_attr "itanium_class" "ialu")])
+
+(define_insn "*load_symptr_low"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+	(lo_sum:DI (match_operand:DI 1 "register_operand" "r")
+		   (match_operand 2 "got_symbolic_operand" "s")))]
+  ""
+{
+  if (HAVE_AS_LTOFFX_LDXMOV_RELOCS)
+    return "%,ld8.mov %0 = [%1], %2";
+  else
+    return "%,ld8 %0 = [%1]";
+}
+  [(set_attr "itanium_class" "ld")])
 
 (define_insn "load_ltoff_dtpmod"
   [(set (match_operand:DI 0 "register_operand" "=r")