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[PATCH]: Fix mulqi3 reload pb in HC11/HC12


Hi!

I committed this patch to fix a reload problem that occurred on mulqi3 pattern
when compiling/running gcc testsuite. (on 3_3 and mainline)

Stephane

2003-03-02 Stephane Carrez <stcarrez at nerim dot fr>

	* config/m68hc11/m68hc11.md ("mulqi3"): Allow address register to
	avoid reload problems; define split for it.
Index: config/m68hc11/m68hc11.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m68hc11/m68hc11.md,v
retrieving revision 1.45
diff -u -p -r1.45 m68hc11.md
--- config/m68hc11/m68hc11.md	2 Mar 2003 20:04:27 -0000	1.45
+++ config/m68hc11/m68hc11.md	2 Mar 2003 20:16:45 -0000
@@ -2894,12 +2894,15 @@
 }")
 
 (define_insn "mulqi3"
-  [(set (match_operand:QI 0 "register_operand" "=d")
-        (mult:QI (match_operand:QI 1 "nonimmediate_operand" "dum")
-		 (match_operand:QI 2 "nonimmediate_operand" "dum")))]
+  [(set (match_operand:QI 0 "register_operand" "=d,*x,*y")
+        (mult:QI (match_operand:QI 1 "nonimmediate_operand" "%dum,0,0")
+		 (match_operand:QI 2 "general_operand" "dium,*xium,*yium")))]
   ""
   "*
 {
+  if (A_REG_P (operands[0]))
+    return \"#\";
+
   if (D_REG_P (operands[1]) && D_REG_P (operands[2]))
     {
       output_asm_insn (\"tba\", operands);
@@ -2924,6 +2927,28 @@
   CC_STATUS_INIT;
   return \"mul\";
 }")
+
+(define_split
+  [(set (match_operand:QI 0 "hard_addr_reg_operand" "")
+        (mult:QI (match_operand:QI 1 "general_operand" "")
+		 (match_operand:QI 2 "general_operand" "")))]
+  "z_replacement_completed == 2"
+  [(parallel [(set (reg:HI D_REGNUM) (match_dup 3))
+	      (set (match_dup 3) (reg:HI D_REGNUM))])
+   (set (reg:QI D_REGNUM) (mult:QI (match_dup 5) (match_dup 6)))
+   (parallel [(set (reg:HI D_REGNUM) (match_dup 3))
+              (set (match_dup 3) (reg:HI D_REGNUM))])]
+  "
+   operands[3] = gen_rtx (REG, HImode, REGNO (operands[0]));
+   if (A_REG_P (operands[1]))
+     operands[5] = gen_rtx (REG, QImode, HARD_D_REGNUM);
+   else
+     operands[5] = operands[1];
+   if (A_REG_P (operands[2]))
+     operands[6] = gen_rtx (REG, QImode, HARD_D_REGNUM);
+   else
+     operands[6] = operands[2];
+  ")
 
 (define_insn "mulqihi3"
   [(set (match_operand:HI 0 "register_operand" "=d,d")

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