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[patch] h8300.md: Add zero_extendqisi2.

Hi,

Attached is a patch to add zero_extendqisi2.

On H8/300H and H8S, zero_extendqisi is performed as

 	mov.b	@er0,r2l ; load a byte
	extu.w	r2       ; zero_extendqihi
	extu.l	er2      ; zero_extendhisi

If the destination register is not mentioned in the source, we can do
better like so:

	sub.l	er2,er2  ; clear the destination
 	mov.b	@er0,r2l ; load a byte using strict_low_part

This saves 2 bytes.

The patch implements this optimization by first accepting
zero_extendqisi2 and then later splitting the pattern in two ways, the
usual way and the strict_low_part way.

Tested on h8300 port.  Committed.

Kazu Hirata

2003-03-02  Kazu Hirata  <kazu at cs dot umass dot edu>

	* config/h8300/h8300.md (zero_extendqisi2): Change to an
	expander.
	(*zero_extendqisi2_h8300): New.
	(*zero_extendqisi2_h8300hs): New.
	(two splitters): New.

Index: h8300.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.md,v
retrieving revision 1.178
diff -c -r1.178 h8300.md
*** h8300.md	2 Mar 2003 02:31:00 -0000	1.178
--- h8300.md	2 Mar 2003 13:36:37 -0000
***************
*** 2043,2051 ****
  	(zero_extend:HI (match_dup 2)))]
    "operands[2] = gen_rtx_REG (QImode, REGNO (operands[0]));")
  
! ;; The compiler can synthesize a H8/300H variant of this which is
! ;; just as efficient as one that we'd create
! (define_insn "zero_extendqisi2"
    [(set (match_operand:SI 0 "register_operand" "=r,r")
  	(zero_extend:SI (match_operand:QI 1 "general_operand_src" "0,g>")))]
    "TARGET_H8300"
--- 2043,2055 ----
  	(zero_extend:HI (match_dup 2)))]
    "operands[2] = gen_rtx_REG (QImode, REGNO (operands[0]));")
  
! (define_expand "zero_extendqisi2"
!   [(set (match_operand:SI 0 "register_operand" "")
! 	(zero_extend:SI (match_operand:QI 1 "general_operand_src" "")))]
!   ""
!   "")
! 
! (define_insn "*zero_extendqisi2_h8300"
    [(set (match_operand:SI 0 "register_operand" "=r,r")
  	(zero_extend:SI (match_operand:QI 1 "general_operand_src" "0,g>")))]
    "TARGET_H8300"
***************
*** 2054,2059 ****
--- 2058,2097 ----
    mov.b	%R1,%w0\;mov.b	#0,%x0\;sub.w	%e0,%e0"
    [(set_attr "length" "4,8")
     (set_attr "cc" "clobber,clobber")])
+ 
+ (define_insn "*zero_extendqisi2_h8300hs"
+   [(set (match_operand:SI 0 "register_operand" "=r,r")
+ 	(zero_extend:SI (match_operand:QI 1 "general_operand_src" "0,g>")))]
+   "TARGET_H8300H || TARGET_H8300S"
+   "@
+   extu.w	%T0\;extu.l	%S0
+   mov.b	%R1,%w0\;extu.w	%T0\;extu.l	%S0"
+   [(set_attr "length" "4,12")
+    (set_attr "cc" "set_znv,set_znv")])
+ 
+ (define_split
+   [(set (match_operand:SI 0 "register_operand" "")
+ 	(zero_extend:SI (match_operand:QI 1 "general_operand_src" "")))]
+   "(TARGET_H8300H || TARGET_H8300S)
+    && reg_overlap_mentioned_p (operands[0], operands[1])
+    && reload_completed" 
+   [(set (match_dup 2)
+ 	(match_dup 1))
+    (set (match_dup 0)
+ 	(zero_extend:SI (match_dup 2)))]
+   "operands[2] = gen_rtx_REG (QImode, REGNO (operands[0]));")
+ 
+ (define_split
+   [(set (match_operand:SI 0 "register_operand" "")
+ 	(zero_extend:SI (match_operand:QI 1 "general_operand_src" "")))]
+   "(TARGET_H8300H || TARGET_H8300S)
+    && !reg_overlap_mentioned_p (operands[0], operands[1])
+    && reload_completed" 
+   [(set (match_dup 0)
+ 	(const_int 0))
+    (set (strict_low_part (match_dup 2))
+ 	(match_dup 1))]
+   "operands[2] = gen_rtx_REG (QImode, REGNO (operands[0]));")
  
  (define_expand "zero_extendhisi2"
    [(set (match_operand:SI 0 "register_operand" "")
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