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[3.3/mainline] Fix SSE move patterns


Hi,
reload knows that we can load 0 into SSE arugment directly, but the move
patterns doesn't causing occasional crashes.

Bootstrapped/regtested x86-64.  OK?
Honza

Sun Feb  9 14:59:53 CET 2003  Jan Hubicka  <jh@suse.cz>
	* i386.c (sse_move_operand): New predicate.
	(ix86_expand_vector_move): Be happy about 0.
	* i386.h (PREDICATE_CODES): Add sse-move_operand.
	* i386.md (mov*_internal): Add 'C' alternative.
Index: config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.531
diff -c -3 -p -r1.531 i386.c
*** config/i386/i386.c	9 Feb 2003 12:35:27 -0000	1.531
--- config/i386/i386.c	9 Feb 2003 13:59:44 -0000
*************** zero_extended_scalar_load_operand (op, m
*** 3736,3741 ****
--- 3736,3754 ----
    return 1;
  }
  
+ /*  Return 1 when OP is operand acceptable for standard SSE move.  */
+ int
+ sse_move_operand (op, mode)
+      rtx op;
+      enum machine_mode mode;
+ {
+   if (nonimmediate_operand (op, mode))
+     return 1;
+   if (GET_MODE (op) != mode && mode != VOIDmode)
+     return 0;
+   return (op == CONST0_RTX (GET_MODE (op)));
+ }
+ 
  /* Return 1 if OP is a comparison that can be used in the CMPSS/CMPPS
     insns.  */
  int
*************** ix86_expand_vector_move (mode, operands)
*** 8161,8167 ****
       to handle some of them more efficiently.  */
    if ((reload_in_progress | reload_completed) == 0
        && register_operand (operands[0], mode)
!       && CONSTANT_P (operands[1]))
      operands[1] = validize_mem (force_const_mem (mode, operands[1]));
  
    /* Make operand1 a register if it isn't already.  */
--- 8174,8180 ----
       to handle some of them more efficiently.  */
    if ((reload_in_progress | reload_completed) == 0
        && register_operand (operands[0], mode)
!       && CONSTANT_P (operands[1]) && operands[1] != CONST0_RTX (mode))
      operands[1] = validize_mem (force_const_mem (mode, operands[1]));
  
    /* Make operand1 a register if it isn't already.  */
Index: config/i386/i386.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.h,v
retrieving revision 1.321
diff -c -3 -p -r1.321 i386.h
*** config/i386/i386.h	7 Feb 2003 22:10:56 -0000	1.321
--- config/i386/i386.h	9 Feb 2003 13:59:44 -0000
*************** do {						\
*** 3039,3044 ****
--- 3039,3045 ----
    {"fp_register_operand", {REG}},					\
    {"register_and_not_fp_reg_operand", {REG}},				\
    {"zero_extended_scalar_load_operand", {MEM}},				\
+   {"sse_move_operand", {CONST_VECTOR, SUBREG, REG, MEM}},		\
  
  /* A list of predicates that do special things with modes, and so
     should not elicit warnings for VOIDmode match_operand.  */
Index: config/i386/i386.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.430
diff -c -3 -p -r1.430 i386.md
*** config/i386/i386.md	9 Feb 2003 12:35:28 -0000	1.430
--- config/i386/i386.md	9 Feb 2003 13:59:45 -0000
***************
*** 18680,18689 ****
  ;; Moves for SSE/MMX regs.
  
  (define_insn "movv4sf_internal"
!   [(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,m")
! 	(match_operand:V4SF 1 "nonimmediate_operand" "xm,x"))]
    "TARGET_SSE"
!   "movaps\t{%1, %0|%0, %1}"
    [(set_attr "type" "ssemov")
     (set_attr "mode" "V4SF")])
  
--- 18680,18692 ----
  ;; Moves for SSE/MMX regs.
  
  (define_insn "movv4sf_internal"
!   [(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,m")
! 	(match_operand:V4SF 1 "sse_move_operand" "C,xm,x"))]
    "TARGET_SSE"
!   "@
!     xorps\t%0, %0
!     movaps\t{%1, %0|%0, %1}
!     movaps\t{%1, %0|%0, %1}"
    [(set_attr "type" "ssemov")
     (set_attr "mode" "V4SF")])
  
***************
*** 18702,18725 ****
  })
  
  (define_insn "movv4si_internal"
!   [(set (match_operand:V4SI 0 "nonimmediate_operand" "=x,m")
! 	(match_operand:V4SI 1 "nonimmediate_operand" "xm,x"))]
    "TARGET_SSE"
  {
!   if (get_attr_mode (insn) == MODE_V4SF)
!     return "movaps\t{%1, %0|%0, %1}";
!   else
!     return "movdqa\t{%1, %0|%0, %1}";
  }
    [(set_attr "type" "ssemov")
     (set (attr "mode")
!         (cond [(eq_attr "alternative" "0")
  		 (if_then_else
  		   (ne (symbol_ref "optimize_size")
  		       (const_int 0))
  		   (const_string "V4SF")
  		   (const_string "TI"))
! 	       (eq_attr "alternative" "1")
  		 (if_then_else
  		   (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
  			    (const_int 0))
--- 18705,18740 ----
  })
  
  (define_insn "movv4si_internal"
!   [(set (match_operand:V4SI 0 "nonimmediate_operand" "=x,x,m")
! 	(match_operand:V4SI 1 "sse_move_operand" "C,xm,x"))]
    "TARGET_SSE"
  {
!   switch (which_alternative)
!     {
!     case 0:
!       if (get_attr_mode (insn) == MODE_V4SF)
! 	return "xorps\t%0, %0";
!       else
! 	return "pxor\t%0, %0";
!     case 1:
!     case 2:
!       if (get_attr_mode (insn) == MODE_V4SF)
! 	return "movaps\t{%1, %0|%0, %1}";
!       else
! 	return "movdqa\t{%1, %0|%0, %1}";
!     default:
!       abort ();
!     }
  }
    [(set_attr "type" "ssemov")
     (set (attr "mode")
!         (cond [(eq_attr "alternative" "0,1")
  		 (if_then_else
  		   (ne (symbol_ref "optimize_size")
  		       (const_int 0))
  		   (const_string "V4SF")
  		   (const_string "TI"))
! 	       (eq_attr "alternative" "2")
  		 (if_then_else
  		   (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
  			    (const_int 0))
***************
*** 18730,18753 ****
  	       (const_string "TI")))])
  
  (define_insn "movv2di_internal"
!   [(set (match_operand:V2DI 0 "nonimmediate_operand" "=x,m")
! 	(match_operand:V2DI 1 "nonimmediate_operand" "xm,x"))]
    "TARGET_SSE2"
  {
!   if (get_attr_mode (insn) == MODE_V4SF)
!     return "movaps\t{%1, %0|%0, %1}";
!   else
!     return "movdqa\t{%1, %0|%0, %1}";
  }
    [(set_attr "type" "ssemov")
     (set (attr "mode")
!         (cond [(eq_attr "alternative" "0")
  		 (if_then_else
  		   (ne (symbol_ref "optimize_size")
  		       (const_int 0))
  		   (const_string "V4SF")
  		   (const_string "TI"))
! 	       (eq_attr "alternative" "1")
  		 (if_then_else
  		   (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
  			    (const_int 0))
--- 18745,18780 ----
  	       (const_string "TI")))])
  
  (define_insn "movv2di_internal"
!   [(set (match_operand:V2DI 0 "nonimmediate_operand" "=x,x,m")
! 	(match_operand:V2DI 1 "sse_move_operand" "C,xm,x"))]
    "TARGET_SSE2"
  {
!   switch (which_alternative)
!     {
!     case 0:
!       if (get_attr_mode (insn) == MODE_V4SF)
! 	return "xorps\t%0, %0";
!       else
! 	return "pxor\t%0, %0";
!     case 1:
!     case 2:
!       if (get_attr_mode (insn) == MODE_V4SF)
! 	return "movaps\t{%1, %0|%0, %1}";
!       else
! 	return "movdqa\t{%1, %0|%0, %1}";
!     default:
!       abort ();
!     }
  }
    [(set_attr "type" "ssemov")
     (set (attr "mode")
!         (cond [(eq_attr "alternative" "0,1")
  		 (if_then_else
  		   (ne (symbol_ref "optimize_size")
  		       (const_int 0))
  		   (const_string "V4SF")
  		   (const_string "TI"))
! 	       (eq_attr "alternative" "2")
  		 (if_then_else
  		   (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
  			    (const_int 0))
***************
*** 18772,18809 ****
  })
  
  (define_insn "movv8qi_internal"
!   [(set (match_operand:V8QI 0 "nonimmediate_operand" "=y,m")
! 	(match_operand:V8QI 1 "nonimmediate_operand" "ym,y"))]
    "TARGET_MMX
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
!   "movq\t{%1, %0|%0, %1}"
    [(set_attr "type" "mmxmov")
     (set_attr "mode" "DI")])
  
  (define_insn "movv4hi_internal"
!   [(set (match_operand:V4HI 0 "nonimmediate_operand" "=y,m")
! 	(match_operand:V4HI 1 "nonimmediate_operand" "ym,y"))]
    "TARGET_MMX
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
!   "movq\t{%1, %0|%0, %1}"
    [(set_attr "type" "mmxmov")
     (set_attr "mode" "DI")])
  
  (define_insn "movv2si_internal"
!   [(set (match_operand:V2SI 0 "nonimmediate_operand" "=y,m")
! 	(match_operand:V2SI 1 "nonimmediate_operand" "ym,y"))]
    "TARGET_MMX
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
!   "movq\t{%1, %0|%0, %1}"
    [(set_attr "type" "mmxcvt")
     (set_attr "mode" "DI")])
  
  (define_insn "movv2sf_internal"
!   [(set (match_operand:V2SF 0 "nonimmediate_operand" "=y,m")
!         (match_operand:V2SF 1 "nonimmediate_operand" "ym,y"))]
    "TARGET_3DNOW
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
!   "movq\\t{%1, %0|%0, %1}"
    [(set_attr "type" "mmxcvt")
     (set_attr "mode" "DI")])
  
--- 18799,18848 ----
  })
  
  (define_insn "movv8qi_internal"
!   [(set (match_operand:V8QI 0 "nonimmediate_operand" "=y,y,m")
! 	(match_operand:V8QI 1 "sse_move_operand" "C,ym,y"))]
    "TARGET_MMX
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
!   "@
!     pxor\t%0, %0
!     movq\t{%1, %0|%0, %1}
!     movq\t{%1, %0|%0, %1}"
    [(set_attr "type" "mmxmov")
     (set_attr "mode" "DI")])
  
  (define_insn "movv4hi_internal"
!   [(set (match_operand:V4HI 0 "nonimmediate_operand" "=y,y,m")
! 	(match_operand:V4HI 1 "sse_move_operand" "C,ym,y"))]
    "TARGET_MMX
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
!   "@
!     pxor\t%0, %0
!     movq\t{%1, %0|%0, %1}
!     movq\t{%1, %0|%0, %1}"
    [(set_attr "type" "mmxmov")
     (set_attr "mode" "DI")])
  
  (define_insn "movv2si_internal"
!   [(set (match_operand:V2SI 0 "nonimmediate_operand" "=y,y,m")
! 	(match_operand:V2SI 1 "sse_move_operand" "C,ym,y"))]
    "TARGET_MMX
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
!   "@
!     pxor\t%0, %0
!     movq\t{%1, %0|%0, %1}
!     movq\t{%1, %0|%0, %1}"
    [(set_attr "type" "mmxcvt")
     (set_attr "mode" "DI")])
  
  (define_insn "movv2sf_internal"
!   [(set (match_operand:V2SF 0 "nonimmediate_operand" "=y,y,m")
!         (match_operand:V2SF 1 "sse_move_operand" "C,ym,y"))]
    "TARGET_3DNOW
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
!   "@
!     pxor\t%0, %0
!     movq\t{%1, %0|%0, %1}
!     movq\t{%1, %0|%0, %1}"
    [(set_attr "type" "mmxcvt")
     (set_attr "mode" "DI")])
  
***************
*** 18820,18844 ****
  })
  
  (define_insn "movv2df_internal"
!   [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,m")
! 	(match_operand:V2DF 1 "nonimmediate_operand" "xm,x"))]
    "TARGET_SSE2
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
  {
!   if (get_attr_mode (insn) == MODE_V4SF)
!     return "movaps\t{%1, %0|%0, %1}";
!   else
!     return "movapd\t{%1, %0|%0, %1}";
  }
    [(set_attr "type" "ssemov")
     (set (attr "mode")
!         (cond [(eq_attr "alternative" "0")
  		 (if_then_else
  		   (ne (symbol_ref "optimize_size")
  		       (const_int 0))
  		   (const_string "V4SF")
  		   (const_string "V2DF"))
! 	       (eq_attr "alternative" "1")
  		 (if_then_else
  		   (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
  			    (const_int 0))
--- 18859,18895 ----
  })
  
  (define_insn "movv2df_internal"
!   [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,x,m")
! 	(match_operand:V2DF 1 "sse_move_operand" "C,xm,x"))]
    "TARGET_SSE2
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
  {
!   switch (which_alternative)
!     {
!     case 0:
!       if (get_attr_mode (insn) == MODE_V4SF)
! 	return "xorps\t%0, %0";
!       else
! 	return "xorpd\t%0, %0";
!     case 1:
!     case 2:
!       if (get_attr_mode (insn) == MODE_V4SF)
! 	return "movaps\t{%1, %0|%0, %1}";
!       else
! 	return "movapd\t{%1, %0|%0, %1}";
!     default:
!       abort ();
!     }
  }
    [(set_attr "type" "ssemov")
     (set (attr "mode")
!         (cond [(eq_attr "alternative" "0,1")
  		 (if_then_else
  		   (ne (symbol_ref "optimize_size")
  		       (const_int 0))
  		   (const_string "V4SF")
  		   (const_string "V2DF"))
! 	       (eq_attr "alternative" "2")
  		 (if_then_else
  		   (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
  			    (const_int 0))
***************
*** 18849,18873 ****
  	       (const_string "V2DF")))])
  
  (define_insn "movv8hi_internal"
!   [(set (match_operand:V8HI 0 "nonimmediate_operand" "=x,m")
! 	(match_operand:V8HI 1 "nonimmediate_operand" "xm,x"))]
    "TARGET_SSE2
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
  {
!   if (get_attr_mode (insn) == MODE_V4SF)
!     return "movaps\t{%1, %0|%0, %1}";
!   else
!     return "movdqa\t{%1, %0|%0, %1}";
  }
    [(set_attr "type" "ssemov")
     (set (attr "mode")
!         (cond [(eq_attr "alternative" "0")
  		 (if_then_else
  		   (ne (symbol_ref "optimize_size")
  		       (const_int 0))
  		   (const_string "V4SF")
  		   (const_string "TI"))
! 	       (eq_attr "alternative" "1")
  		 (if_then_else
  		   (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
  			    (const_int 0))
--- 18900,18936 ----
  	       (const_string "V2DF")))])
  
  (define_insn "movv8hi_internal"
!   [(set (match_operand:V8HI 0 "nonimmediate_operand" "=x,x,m")
! 	(match_operand:V8HI 1 "sse_move_operand" "C,xm,x"))]
    "TARGET_SSE2
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
  {
!   switch (which_alternative)
!     {
!     case 0:
!       if (get_attr_mode (insn) == MODE_V4SF)
! 	return "xorps\t%0, %0";
!       else
! 	return "pxor\t%0, %0";
!     case 1:
!     case 2:
!       if (get_attr_mode (insn) == MODE_V4SF)
! 	return "movaps\t{%1, %0|%0, %1}";
!       else
! 	return "movdqa\t{%1, %0|%0, %1}";
!     default:
!       abort ();
!     }
  }
    [(set_attr "type" "ssemov")
     (set (attr "mode")
!         (cond [(eq_attr "alternative" "0,1")
  		 (if_then_else
  		   (ne (symbol_ref "optimize_size")
  		       (const_int 0))
  		   (const_string "V4SF")
  		   (const_string "TI"))
! 	       (eq_attr "alternative" "2")
  		 (if_then_else
  		   (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
  			    (const_int 0))
***************
*** 18883,18902 ****
    "TARGET_SSE2
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
  {
!   if (get_attr_mode (insn) == MODE_V4SF)
!     return "movaps\t{%1, %0|%0, %1}";
!   else
!     return "movdqa\t{%1, %0|%0, %1}";
  }
    [(set_attr "type" "ssemov")
     (set (attr "mode")
!         (cond [(eq_attr "alternative" "0")
  		 (if_then_else
  		   (ne (symbol_ref "optimize_size")
  		       (const_int 0))
  		   (const_string "V4SF")
  		   (const_string "TI"))
! 	       (eq_attr "alternative" "1")
  		 (if_then_else
  		   (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
  			    (const_int 0))
--- 18946,18977 ----
    "TARGET_SSE2
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
  {
!   switch (which_alternative)
!     {
!     case 0:
!       if (get_attr_mode (insn) == MODE_V4SF)
! 	return "xorps\t%0, %0";
!       else
! 	return "pxor\t%0, %0";
!     case 1:
!     case 2:
!       if (get_attr_mode (insn) == MODE_V4SF)
! 	return "movaps\t{%1, %0|%0, %1}";
!       else
! 	return "movdqa\t{%1, %0|%0, %1}";
!     default:
!       abort ();
!     }
  }
    [(set_attr "type" "ssemov")
     (set (attr "mode")
!         (cond [(eq_attr "alternative" "0,1")
  		 (if_then_else
  		   (ne (symbol_ref "optimize_size")
  		       (const_int 0))
  		   (const_string "V4SF")
  		   (const_string "TI"))
! 	       (eq_attr "alternative" "2")
  		 (if_then_else
  		   (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
  			    (const_int 0))
***************
*** 19087,19093 ****
  
  (define_insn "movti_internal"
    [(set (match_operand:TI 0 "nonimmediate_operand" "=x,x,m")
! 	(match_operand:TI 1 "general_operand" "C,xm,x"))]
    "TARGET_SSE && !TARGET_64BIT
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
  {
--- 19162,19168 ----
  
  (define_insn "movti_internal"
    [(set (match_operand:TI 0 "nonimmediate_operand" "=x,x,m")
! 	(match_operand:TI 1 "sse_move_operand" "C,xm,x"))]
    "TARGET_SSE && !TARGET_64BIT
     && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
  {


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