This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[altivec] fix crashes when using -dXXX


vscr and the spe registers were missing from some tables; this causes
randomish crashes (and garbage in output) when using -da or the likes.
This happens since a few months already at least, so maybe apply to the
3.3/3.2 branches too?

I also tidied up these tables.


2002-12-29  Segher Boessenkool  <segher@koffie.nl>

	* config/rs6000/rs6000.c (rs6000_reg_names): Add missing registers.
	(alt_reg_names): Ditto, fix formatting.
	* config/rs6000/rs6000.h (DEBUG_REGISTER_NAMES): Fix formatting.



*** ../../gcc-clean/gcc/config/rs6000/rs6000.c	Fri Dec 27 03:21:14 2002
--- ./config/rs6000/rs6000.c	Sun Dec 29 04:32:06 2002
*************** char rs6000_reg_names[][8] =
*** 284,290 ****
        "8",  "9",  "10", "11", "12", "13", "14", "15",
        "16", "17", "18", "19", "20", "21", "22", "23",
        "24", "25", "26", "27", "28", "29", "30", "31",
!       "vrsave"
  };
  
  #ifdef TARGET_REGNAMES
--- 284,292 ----
        "8",  "9",  "10", "11", "12", "13", "14", "15",
        "16", "17", "18", "19", "20", "21", "22", "23",
        "24", "25", "26", "27", "28", "29", "30", "31",
!       "vrsave", "vscr",
!       /* SPE registers.  */
!       "spe_acc", "spefscr"
  };
  
  #ifdef TARGET_REGNAMES
*************** static const char alt_reg_names[][8] =
*** 301,312 ****
      "mq",    "lr",  "ctr",   "ap",
    "%cr0",  "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
     "xer",
!    /* AltiVec registers.  */
     "%v0",  "%v1",  "%v2",  "%v3",  "%v4",  "%v5",  "%v6", "%v7",
!    "%v8",  "%v9",  "%v10", "%v11", "%v12", "%v13", "%v14", "%v15",
!    "%v16", "%v17", "%v18", "%v19", "%v20", "%v21", "%v22", "%v23",
!    "%v24", "%v25", "%v26", "%v27", "%v28", "%v29", "%v30", "%v31",
!    "vrsave"
  };
  #endif
  
--- 303,316 ----
      "mq",    "lr",  "ctr",   "ap",
    "%cr0",  "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
     "xer",
!   /* AltiVec registers.  */
     "%v0",  "%v1",  "%v2",  "%v3",  "%v4",  "%v5",  "%v6", "%v7",
!    "%v8",  "%v9", "%v10", "%v11", "%v12", "%v13", "%v14", "%v15",
!   "%v16", "%v17", "%v18", "%v19", "%v20", "%v21", "%v22", "%v23",
!   "%v24", "%v25", "%v26", "%v27", "%v28", "%v29", "%v30", "%v31",
!   "vrsave", "vscr",
!   /* SPE registers.  */
!   "spe_acc", "spefscr"
  };
  #endif
  
*** ../../gcc-clean/gcc/config/rs6000/rs6000.h	Fri Dec 27 03:21:40 2002
--- ./config/rs6000/rs6000.h	Sun Dec 29 04:43:53 2002
*************** extern char rs6000_reg_names[][8];	/* re
*** 2723,2730 ****
  
  #define DEBUG_REGISTER_NAMES						\
  {									\
!      "r0", "r1",   "r2",  "r3",  "r4",  "r5",  "r6",  "r7",		\
!      "r8", "r9",  "r10", "r11", "r12", "r13", "r14", "r15",		\
      "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",		\
      "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",		\
       "f0",  "f1",  "f2",  "f3",  "f4",  "f5",  "f6",  "f7",		\
--- 2723,2730 ----
  
  #define DEBUG_REGISTER_NAMES						\
  {									\
!      "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",		\
!      "r8",  "r9", "r10", "r11", "r12", "r13", "r14", "r15",		\
      "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",		\
      "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",		\
       "f0",  "f1",  "f2",  "f3",  "f4",  "f5",  "f6",  "f7",		\
*************** extern char rs6000_reg_names[][8];	/* re
*** 2733,2745 ****
      "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",		\
       "mq",  "lr", "ctr",  "ap",						\
      "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",		\
!   "xer",								\
       "v0",  "v1",  "v2",  "v3",  "v4",  "v5",  "v6",  "v7",             \
       "v8",  "v9", "v10", "v11", "v12", "v13", "v14", "v15",             \
      "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",             \
      "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",             \
!     "vrsave", "vscr"							\
!     , "spe_acc", "spefscr"                                              \
  }
  
  /* Table of additional register names to use in user input.  */
--- 2733,2745 ----
      "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",		\
       "mq",  "lr", "ctr",  "ap",						\
      "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",		\
!     "xer",								\
       "v0",  "v1",  "v2",  "v3",  "v4",  "v5",  "v6",  "v7",             \
       "v8",  "v9", "v10", "v11", "v12", "v13", "v14", "v15",             \
      "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",             \
      "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",             \
!     "vrsave", "vscr",							\
!     "spe_acc", "spefscr"                                                \
  }
  
  /* Table of additional register names to use in user input.  */



Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]