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[3.4-BIB] Minnor i386.md attribute tweeks
- From: Jan Hubicka <jh at suse dot cz>
- To: gcc-patches at gcc dot gnu dot org, rth at cygnus dot com
- Date: Wed, 20 Nov 2002 14:02:13 +0100
- Subject: [3.4-BIB] Minnor i386.md attribute tweeks
Hi,
while looking at athlon profiles, I noticed that leave is wrong and
some of SSE instructions gets confused because mode is set to unknownfp
that is not expected by scheduler description. It seems to be better to
remove these special cases.
Wed Nov 20 13:55:29 CET 2002 Jan Hubicka <jh@suse.cz>
* i386.md (type attribute): Add leave
(mode attribute): Remove unknownfp.
(length_immediate, modrm, memory attributes): Handle leave correctly.
(fp comparison patterns): Determine FP mode.
(leave, leave_rex64): Remove special cases.
* ppro.md (ppro_uops, ppro_p2): Add leave
* pentiun.md (pent_pop): Handle leave too.
* k6.md (k6_load): Handle leave.
* athlon.md (athlon_leave, athlon_pop): Fix.
(athlon_decode): Handle leave.
Index: i386.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.380.4.27
diff -c -3 -p -r1.380.4.27 i386.md
*** i386.md 17 Nov 2002 13:02:55 -0000 1.380.4.27
--- i386.md 20 Nov 2002 12:53:13 -0000
***************
*** 142,148 ****
alu,alu1,negnot,imov,imovx,lea,
incdec,ishift,rotate,imul,idiv,
icmp,test,ibr,setcc,icmov,
! push,pop,call,callv,
str,cld,
fmov,fop,fsgn,fmul,fdiv,fpspc,fcmov,fcmp,fxch,fistp,
sselog,sseiadd,sseishft,sseimul,
--- 142,148 ----
alu,alu1,negnot,imov,imovx,lea,
incdec,ishift,rotate,imul,idiv,
icmp,test,ibr,setcc,icmov,
! push,pop,call,callv,leave,
str,cld,
fmov,fop,fsgn,fmul,fdiv,fpspc,fcmov,fcmp,fxch,fistp,
sselog,sseiadd,sseishft,sseimul,
***************
*** 152,158 ****
;; Main data type used by the insn
(define_attr "mode"
! "unknown,none,QI,HI,SI,DI,unknownfp,SF,DF,XF,TI,V4SF,V2DF,V2SF"
(const_string "unknown"))
;; The CPU unit operations uses.
--- 152,158 ----
;; Main data type used by the insn
(define_attr "mode"
! "unknown,none,QI,HI,SI,DI,SF,DF,XF,TI,V4SF,V2DF,V2SF"
(const_string "unknown"))
;; The CPU unit operations uses.
***************
*** 170,176 ****
;; The (bounding maximum) length of an instruction immediate.
(define_attr "length_immediate" ""
! (cond [(eq_attr "type" "incdec,setcc,icmov,str,cld,lea,other,multi,idiv")
(const_int 0)
(eq_attr "unit" "i387,sse,mmx")
(const_int 0)
--- 170,176 ----
;; The (bounding maximum) length of an instruction immediate.
(define_attr "length_immediate" ""
! (cond [(eq_attr "type" "incdec,setcc,icmov,str,cld,lea,other,multi,idiv,leave")
(const_int 0)
(eq_attr "unit" "i387,sse,mmx")
(const_int 0)
***************
*** 237,243 ****
;; Set when modrm byte is used.
(define_attr "modrm" ""
! (cond [(eq_attr "type" "str,cld")
(const_int 0)
(eq_attr "unit" "i387")
(const_int 0)
--- 237,243 ----
;; Set when modrm byte is used.
(define_attr "modrm" ""
! (cond [(eq_attr "type" "str,cld,leave")
(const_int 0)
(eq_attr "unit" "i387")
(const_int 0)
***************
*** 291,297 ****
(const_string "unknown")
(eq_attr "type" "lea,fcmov,fpspc,cld")
(const_string "none")
! (eq_attr "type" "fistp")
(const_string "both")
(eq_attr "type" "push")
(if_then_else (match_operand 1 "memory_operand" "")
--- 291,297 ----
(const_string "unknown")
(eq_attr "type" "lea,fcmov,fpspc,cld")
(const_string "none")
! (eq_attr "type" "fistp,leave")
(const_string "both")
(eq_attr "type" "push")
(if_then_else (match_operand 1 "memory_operand" "")
***************
*** 757,763 ****
return "ftst\;fnstsw\t%0";
}
[(set_attr "type" "multi")
! (set_attr "mode" "unknownfp")])
;; We may not use "#" to split and emit these, since the REG_DEAD notes
;; used to manage the reg stack popping would not be preserved.
--- 757,769 ----
return "ftst\;fnstsw\t%0";
}
[(set_attr "type" "multi")
! (set (attr "mode")
! (cond [(match_operand:SF 1 "" "")
! (const_string "SF")
! (match_operand:DF 1 "" "")
! (const_string "DF")
! ]
! (const_string "XF")))])
;; We may not use "#" to split and emit these, since the REG_DEAD notes
;; used to manage the reg stack popping would not be preserved.
***************
*** 860,866 ****
&& GET_MODE (operands[0]) == GET_MODE (operands[1])"
"* return output_fp_compare (insn, operands, 0, 1);"
[(set_attr "type" "fcmp")
! (set_attr "mode" "unknownfp")])
(define_insn "*cmpfp_2u_1"
[(set (match_operand:HI 0 "register_operand" "=a")
--- 866,878 ----
&& GET_MODE (operands[0]) == GET_MODE (operands[1])"
"* return output_fp_compare (insn, operands, 0, 1);"
[(set_attr "type" "fcmp")
! (set (attr "mode")
! (cond [(match_operand:SF 1 "" "")
! (const_string "SF")
! (match_operand:DF 1 "" "")
! (const_string "DF")
! ]
! (const_string "XF")))])
(define_insn "*cmpfp_2u_1"
[(set (match_operand:HI 0 "register_operand" "=a")
***************
*** 874,880 ****
&& GET_MODE (operands[1]) == GET_MODE (operands[2])"
"* return output_fp_compare (insn, operands, 2, 1);"
[(set_attr "type" "multi")
! (set_attr "mode" "unknownfp")])
;; Patterns to match the SImode-in-memory ficom instructions.
;;
--- 886,898 ----
&& GET_MODE (operands[1]) == GET_MODE (operands[2])"
"* return output_fp_compare (insn, operands, 2, 1);"
[(set_attr "type" "multi")
! (set (attr "mode")
! (cond [(match_operand:SF 1 "" "")
! (const_string "SF")
! (match_operand:DF 1 "" "")
! (const_string "DF")
! ]
! (const_string "XF")))])
;; Patterns to match the SImode-in-memory ficom instructions.
;;
***************
*** 914,920 ****
;; FP compares, step 2
;; Move the fpsw to ax.
! (define_insn "x86_fnstsw_1"
[(set (match_operand:HI 0 "register_operand" "=a")
(unspec:HI [(reg 18)] UNSPEC_FNSTSW))]
"TARGET_80387"
--- 932,938 ----
;; FP compares, step 2
;; Move the fpsw to ax.
! (define_insn "*x86_fnstsw_1"
[(set (match_operand:HI 0 "register_operand" "=a")
(unspec:HI [(reg 18)] UNSPEC_FNSTSW))]
"TARGET_80387"
***************
*** 949,955 ****
&& GET_MODE (operands[0]) == GET_MODE (operands[0])"
"* return output_fp_compare (insn, operands, 1, 0);"
[(set_attr "type" "fcmp")
! (set_attr "mode" "unknownfp")
(set_attr "athlon_decode" "vector")])
(define_insn "*cmpfp_i_sse"
--- 967,979 ----
&& GET_MODE (operands[0]) == GET_MODE (operands[0])"
"* return output_fp_compare (insn, operands, 1, 0);"
[(set_attr "type" "fcmp")
! (set (attr "mode")
! (cond [(match_operand:SF 1 "" "")
! (const_string "SF")
! (match_operand:DF 1 "" "")
! (const_string "DF")
! ]
! (const_string "XF")))
(set_attr "athlon_decode" "vector")])
(define_insn "*cmpfp_i_sse"
***************
*** 961,967 ****
&& GET_MODE (operands[0]) == GET_MODE (operands[0])"
"* return output_fp_compare (insn, operands, 1, 0);"
[(set_attr "type" "fcmp,ssecmp")
! (set_attr "mode" "unknownfp")
(set_attr "athlon_decode" "vector")])
(define_insn "*cmpfp_i_sse_only"
--- 985,994 ----
&& GET_MODE (operands[0]) == GET_MODE (operands[0])"
"* return output_fp_compare (insn, operands, 1, 0);"
[(set_attr "type" "fcmp,ssecmp")
! (set (attr "mode")
! (if_then_else (match_operand:SF 1 "" "")
! (const_string "SF")
! (const_string "DF")))
(set_attr "athlon_decode" "vector")])
(define_insn "*cmpfp_i_sse_only"
***************
*** 972,978 ****
&& GET_MODE (operands[0]) == GET_MODE (operands[0])"
"* return output_fp_compare (insn, operands, 1, 0);"
[(set_attr "type" "ssecmp")
! (set_attr "mode" "unknownfp")
(set_attr "athlon_decode" "vector")])
(define_insn "*cmpfp_iu"
--- 999,1008 ----
&& GET_MODE (operands[0]) == GET_MODE (operands[0])"
"* return output_fp_compare (insn, operands, 1, 0);"
[(set_attr "type" "ssecmp")
! (set (attr "mode")
! (if_then_else (match_operand:SF 1 "" "")
! (const_string "SF")
! (const_string "DF")))
(set_attr "athlon_decode" "vector")])
(define_insn "*cmpfp_iu"
***************
*** 985,991 ****
&& GET_MODE (operands[0]) == GET_MODE (operands[1])"
"* return output_fp_compare (insn, operands, 1, 1);"
[(set_attr "type" "fcmp")
! (set_attr "mode" "unknownfp")
(set_attr "athlon_decode" "vector")])
(define_insn "*cmpfp_iu_sse"
--- 1015,1027 ----
&& GET_MODE (operands[0]) == GET_MODE (operands[1])"
"* return output_fp_compare (insn, operands, 1, 1);"
[(set_attr "type" "fcmp")
! (set (attr "mode")
! (cond [(match_operand:SF 1 "" "")
! (const_string "SF")
! (match_operand:DF 1 "" "")
! (const_string "DF")
! ]
! (const_string "XF")))
(set_attr "athlon_decode" "vector")])
(define_insn "*cmpfp_iu_sse"
***************
*** 997,1003 ****
&& GET_MODE (operands[0]) == GET_MODE (operands[1])"
"* return output_fp_compare (insn, operands, 1, 1);"
[(set_attr "type" "fcmp,ssecmp")
! (set_attr "mode" "unknownfp")
(set_attr "athlon_decode" "vector")])
(define_insn "*cmpfp_iu_sse_only"
--- 1033,1042 ----
&& GET_MODE (operands[0]) == GET_MODE (operands[1])"
"* return output_fp_compare (insn, operands, 1, 1);"
[(set_attr "type" "fcmp,ssecmp")
! (set (attr "mode")
! (if_then_else (match_operand:SF 1 "" "")
! (const_string "SF")
! (const_string "DF")))
(set_attr "athlon_decode" "vector")])
(define_insn "*cmpfp_iu_sse_only"
***************
*** 1008,1014 ****
&& GET_MODE (operands[0]) == GET_MODE (operands[1])"
"* return output_fp_compare (insn, operands, 1, 1);"
[(set_attr "type" "ssecmp")
! (set_attr "mode" "unknownfp")
(set_attr "athlon_decode" "vector")])
;; Move instructions.
--- 1047,1056 ----
&& GET_MODE (operands[0]) == GET_MODE (operands[1])"
"* return output_fp_compare (insn, operands, 1, 1);"
[(set_attr "type" "ssecmp")
! (set (attr "mode")
! (if_then_else (match_operand:SF 1 "" "")
! (const_string "SF")
! (const_string "DF")))
(set_attr "athlon_decode" "vector")])
;; Move instructions.
***************
*** 14008,14018 ****
(clobber (mem:BLK (scratch)))]
"!TARGET_64BIT"
"leave"
! [(set_attr "length_immediate" "0")
! (set_attr "length" "1")
! (set_attr "modrm" "0")
! (set_attr "athlon_decode" "vector")
! (set_attr "ppro_uops" "few")])
(define_insn "leave_rex64"
[(set (reg:DI 7) (plus:DI (reg:DI 6) (const_int 8)))
--- 14050,14056 ----
(clobber (mem:BLK (scratch)))]
"!TARGET_64BIT"
"leave"
! [(set_attr "type" "leave")])
(define_insn "leave_rex64"
[(set (reg:DI 7) (plus:DI (reg:DI 6) (const_int 8)))
***************
*** 14020,14030 ****
(clobber (mem:BLK (scratch)))]
"TARGET_64BIT"
"leave"
! [(set_attr "length_immediate" "0")
! (set_attr "length" "1")
! (set_attr "modrm" "0")
! (set_attr "athlon_decode" "vector")
! (set_attr "ppro_uops" "few")])
(define_expand "ffssi2"
[(set (match_operand:SI 0 "nonimmediate_operand" "")
--- 14058,14064 ----
(clobber (mem:BLK (scratch)))]
"TARGET_64BIT"
"leave"
! [(set_attr "type" "leave")])
(define_expand "ffssi2"
[(set (match_operand:SI 0 "nonimmediate_operand" "")
Index: ppro.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/ppro.md,v
retrieving revision 1.1
diff -c -3 -p -r1.1 ppro.md
*** ppro.md 9 May 2002 23:41:39 -0000 1.1
--- ppro.md 20 Nov 2002 12:55:20 -0000
***************
*** 29,35 ****
(define_attr "ppro_uops" "one,few,many"
(cond [(eq_attr "type" "other,multi,call,callv,fpspc,str")
(const_string "many")
! (eq_attr "type" "icmov,fcmov,str,cld")
(const_string "few")
(eq_attr "type" "imov")
(if_then_else (eq_attr "memory" "store,both")
--- 29,35 ----
(define_attr "ppro_uops" "one,few,many"
(cond [(eq_attr "type" "other,multi,call,callv,fpspc,str")
(const_string "many")
! (eq_attr "type" "icmov,fcmov,str,cld,leave")
(const_string "few")
(eq_attr "type" "imov")
(if_then_else (eq_attr "memory" "store,both")
***************
*** 118,124 ****
(define_function_unit "ppro_p2" 1 0
(and (eq_attr "cpu" "pentiumpro")
! (ior (eq_attr "type" "pop")
(eq_attr "memory" "load,both")))
3 1)
--- 118,124 ----
(define_function_unit "ppro_p2" 1 0
(and (eq_attr "cpu" "pentiumpro")
! (ior (eq_attr "type" "pop,leave")
(eq_attr "memory" "load,both")))
3 1)
Index: pentium.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/pentium.md,v
retrieving revision 1.1.16.2
diff -c -3 -p -r1.1.16.2 pentium.md
*** pentium.md 20 Sep 2002 01:29:14 -0000 1.1.16.2
--- pentium.md 20 Nov 2002 12:55:20 -0000
***************
*** 188,194 ****
(define_insn_reservation "pent_pop" 1
(and (eq_attr "cpu" "pentium")
! (eq_attr "type" "pop"))
"pentium-firstuv")
;; Call and branch instruction can execute in either pipe, but
--- 188,194 ----
(define_insn_reservation "pent_pop" 1
(and (eq_attr "cpu" "pentium")
! (eq_attr "type" "pop,leave"))
"pentium-firstuv")
;; Call and branch instruction can execute in either pipe, but
Index: k6.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/k6.md,v
retrieving revision 1.1
diff -c -3 -p -r1.1 k6.md
*** k6.md 9 May 2002 23:41:39 -0000 1.1
--- k6.md 20 Nov 2002 12:55:20 -0000
***************
*** 71,77 ****
;; Load unit have two cycle latency, but we take care for it in adjust_cost
(define_function_unit "k6_load" 1 0
(and (eq_attr "cpu" "k6")
! (ior (eq_attr "type" "pop")
(eq_attr "memory" "load,both")))
1 1)
--- 71,77 ----
;; Load unit have two cycle latency, but we take care for it in adjust_cost
(define_function_unit "k6_load" 1 0
(and (eq_attr "cpu" "k6")
! (ior (eq_attr "type" "pop,leave")
(eq_attr "memory" "load,both")))
1 1)
Index: athlon.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/athlon.md,v
retrieving revision 1.1.16.1
diff -c -3 -p -r1.1.16.1 athlon.md
*** athlon.md 5 Oct 2002 21:27:49 -0000 1.1.16.1
--- athlon.md 20 Nov 2002 13:00:16 -0000
***************
*** 18,24 ****
;; communicates with all the execution units separately instead.
(define_attr "athlon_decode" "direct,vector"
! (cond [(eq_attr "type" "call,imul,idiv,other,multi,fcmov,fpspc,str,pop,cld")
(const_string "vector")
(and (eq_attr "type" "push")
(match_operand 1 "memory_operand" ""))
--- 18,24 ----
;; communicates with all the execution units separately instead.
(define_attr "athlon_decode" "direct,vector"
! (cond [(eq_attr "type" "call,imul,idiv,other,multi,fcmov,fpspc,str,pop,cld,leave")
(const_string "vector")
(and (eq_attr "type" "push")
(match_operand 1 "memory_operand" ""))
***************
*** 102,112 ****
"athlon-direct,nothing,athlon-store")
(define_insn_reservation "athlon_pop" 4
(and (eq_attr "cpu" "athlon")
! (eq_attr "type" "push"))
"athlon-vector,athlon-ieu,athlon-load")
(define_insn_reservation "athlon_leave" 3
(and (eq_attr "cpu" "athlon")
! (eq_attr "type" "push"))
"athlon-vector,athlon-load")
;; Lea executes in AGU unit with 2 cycles latency.
--- 102,112 ----
"athlon-direct,nothing,athlon-store")
(define_insn_reservation "athlon_pop" 4
(and (eq_attr "cpu" "athlon")
! (eq_attr "type" "pop"))
"athlon-vector,athlon-ieu,athlon-load")
(define_insn_reservation "athlon_leave" 3
(and (eq_attr "cpu" "athlon")
! (eq_attr "type" "leave"))
"athlon-vector,athlon-load")
;; Lea executes in AGU unit with 2 cycles latency.