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SSE fix 11 - ABI fix
- From: Jan Hubicka <jh at suse dot cz>
- To: gcc-patches at gcc dot gnu dot org, rth at cygnus dot com,radkver at atrey dot karlin dot mff dot cuni dot cz
- Date: Fri, 18 Oct 2002 11:34:04 +0200
- Subject: SSE fix 11 - ABI fix
Hi,
this makes ABI compatible with ICC 6.0 - up to 3 mmx/sse arguments are
passed in registers, structures are passed on stack even when contain
single MMX element, varardic functions do not use register operands at
all.
Honza
Fri Oct 18 02:04:25 CEST 2002 Jan Hubicka <jh@suse.cz>
* i386.h (ix86_args): Add MMX fields.
(MMX_REGPARM_MAX): New macro.
(SSE_REGPARM_MAX): Set to 3 for 32bit compilation.
(init_cumulative_args, function_arg_advance,
function_arg): Handle MMX/SSE regparms.
*** i386.h.old Fri Oct 18 00:39:50 2002
--- i386.h Fri Oct 18 02:02:35 2002
*************** typedef struct ix86_args {
*** 1631,1636 ****
--- 1641,1649 ----
int sse_words; /* # sse words passed so far */
int sse_nregs; /* # sse registers available for passing */
int sse_regno; /* next available sse register number */
+ int mmx_words; /* # mmx words passed so far */
+ int mmx_nregs; /* # mmx registers available for passing */
+ int mmx_regno; /* next available mmx register number */
int maybe_vaarg; /* true for calls to possibly vardic fncts. */
} CUMULATIVE_ARGS;
*************** enum ix86_builtins
*** 2427,2433 ****
#define REGPARM_MAX (TARGET_64BIT ? 6 : 3)
! #define SSE_REGPARM_MAX (TARGET_64BIT ? 8 : 0)
/* Specify the machine mode that this machine uses
--- 2440,2448 ----
#define REGPARM_MAX (TARGET_64BIT ? 6 : 3)
! #define SSE_REGPARM_MAX (TARGET_64BIT ? 8 : 3)
!
! #define MMX_REGPARM_MAX (TARGET_64BIT ? 0 : 3)
/* Specify the machine mode that this machine uses
*** i386.c.old Fri Oct 18 00:27:49 2002
--- i386.c Fri Oct 18 02:02:46 2002
*************** init_cumulative_args (cum, fntype, libna
*** 1503,1508 ****
--- 1503,1509 ----
/* Set up the number of registers to use for passing arguments. */
cum->nregs = ix86_regparm;
cum->sse_nregs = SSE_REGPARM_MAX;
+ cum->mmx_nregs = MMX_REGPARM_MAX;
if (fntype && !TARGET_64BIT)
{
tree attr = lookup_attribute ("regparm", TYPE_ATTRIBUTES (fntype));
*************** function_arg_advance (cum, mode, type, n
*** 2073,2080 ****
if (TARGET_DEBUG_ARG)
fprintf (stderr,
! "function_adv (sz=%d, wds=%2d, nregs=%d, mode=%s, named=%d)\n\n",
! words, cum->words, cum->nregs, GET_MODE_NAME (mode), named);
if (TARGET_64BIT)
{
int int_nregs, sse_nregs;
--- 2074,2081 ----
if (TARGET_DEBUG_ARG)
fprintf (stderr,
! "function_adv (sz=%d, wds=%2d, nregs=%d, ssenregs=%d, mode=%s, named=%d)\n\n",
! words, cum->words, cum->nregs, cum->sse_nregs, GET_MODE_NAME (mode), named);
if (TARGET_64BIT)
{
int int_nregs, sse_nregs;
*************** function_arg_advance (cum, mode, type, n
*** 2092,2098 ****
}
else
{
! if (TARGET_SSE && mode == TImode)
{
cum->sse_words += words;
cum->sse_nregs -= 1;
--- 2093,2100 ----
}
else
{
! if (TARGET_SSE && SSE_REG_MODE_P (mode)
! && (!type || !AGGREGATE_TYPE_P (type)))
{
cum->sse_words += words;
cum->sse_nregs -= 1;
*************** function_arg_advance (cum, mode, type, n
*** 2103,2108 ****
--- 2105,2122 ----
cum->sse_regno = 0;
}
}
+ else if (TARGET_MMX && MMX_REG_MODE_P (mode)
+ && (!type || !AGGREGATE_TYPE_P (type)))
+ {
+ cum->mmx_words += words;
+ cum->mmx_nregs -= 1;
+ cum->mmx_regno += 1;
+ if (cum->mmx_nregs <= 0)
+ {
+ cum->mmx_nregs = 0;
+ cum->mmx_regno = 0;
+ }
+ }
else
{
cum->words += words;
*************** function_arg (cum, mode, type, named)
*** 2174,2185 ****
case SImode:
case HImode:
case QImode:
! if (words <= cum->nregs)
ret = gen_rtx_REG (mode, cum->regno);
break;
case TImode:
! if (cum->sse_nregs)
! ret = gen_rtx_REG (mode, cum->sse_regno);
break;
}
--- 2188,2212 ----
case SImode:
case HImode:
case QImode:
! if (words <= cum->nregs && (!type || !AGGREGATE_TYPE_P (type)))
ret = gen_rtx_REG (mode, cum->regno);
break;
case TImode:
! case V16QImode:
! case V8HImode:
! case V4SImode:
! case V2DImode:
! case V4SFmode:
! case V2DFmode:
! if (cum->sse_nregs && (!type || !AGGREGATE_TYPE_P (type)))
! ret = gen_rtx_REG (mode, cum->sse_regno + FIRST_SSE_REG);
! break;
! case V8QImode:
! case V4HImode:
! case V2SImode:
! case V2SFmode:
! if (cum->mmx_nregs)
! ret = gen_rtx_REG (mode, cum->mmx_regno + FIRST_MMX_REG);
break;
}