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Re: Another patch to the mips64vr-elf config.
- From: Richard Henderson <rth at redhat dot com>
- To: Richard Sandiford <rsandifo at redhat dot com>
- Cc: gcc-patches at gcc dot gnu dot org, echristo at redhat dot com
- Date: Wed, 16 Oct 2002 17:31:32 -0700
- Subject: Re: Another patch to the mips64vr-elf config.
- References: <wvnk7kimye1.fsf@talisman.cambridge.redhat.com>
On Wed, Oct 16, 2002 at 12:11:34PM +0100, Richard Sandiford wrote:
> + if ((target_flags_explicit & MASK_SOFT_FLOAT) == 0)
> + {
> + /* If the user didn't say whether an FPU was available, and
> + we have a processor without an FPU, assume -msoft-float.
> + The idea is that:
> +
> + - Any configuration can generate code for the processors
> + listed here without an explicit FPU switch.
> +
> + - Configurations which default to a processor listed here can
> + generate code for hard-float processors without an FPU switch,
> + provided they don't include MASK_SOFT_FLOAT in the default
> + target flags. */
I think this is wrong. In particular, I know this will cause
problems for various embedded linux targets.
The reason being that an operating system *can* provide software
emulation of the fpu in a trap handler, and yet -msoft-float changes
the parameter passing ABI, so we are no longer compatible with
the system hard-float libc.
r~