[PATCH] libjava updates for s390/s390x

["Ulrich Weigand" <Ulrich dot Weigand at de dot ibm dot com>]

Hello,

this patch enables the Java interpreter on s390* platforms.  (This
requires the separately posted libffi patch to actually work).

It also adds a locks.h file for the s390/s390x platforms, and enables
the hash synchronization that was disabled due to missing locks support.

Bootstrapped/regtested on s390-ibm-linux and s390x-ibm-linux.

OK to apply?

ChangeLog:

      * configure.host [s390*-*]: Enable Java interpreter.
      Enable hash sychnronization.  Add sysdeps dir.
      * sysdep/s390/locks.h: New file.

Index: libjava/configure.host
===================================================================
RCS file: /cvs/gcc/gcc/libjava/configure.host,v
retrieving revision 1.38
diff -c -p -r1.38 configure.host
*** libjava/configure.host    28 Sep 2002 12:15:18 -0000    1.38
--- libjava/configure.host    30 Sep 2002 17:32:12 -0000
*************** case "${host}" in
*** 127,132 ****
--- 127,137 ----
      enable_hash_synchronization_default=yes
      slow_pthread_self=yes
      ;;
+   s390*-*)
+     sysdeps_dir=s390
+     libgcj_interpreter=yes
+     enable_hash_synchronization_default=yes
+     ;;
    sparc-*)
          ;;
    ia64-*)
*** /dev/null     Thu Jan  1 01:00:00 1970
--- libjava/sysdep/s390/locks.h     Mon Sep 30 19:25:49 2002
***************
*** 0 ****
--- 1,77 ----
+ // locks.h - Thread synchronization primitives. S/390 implementation.
+
+ /* Copyright (C) 2002  Free Software Foundation
+
+    This file is part of libgcj.
+
+ This software is copyrighted work licensed under the terms of the
+ Libgcj License.  Please consult the file "LIBGCJ_LICENSE" for
+ details.  */
+
+ #ifndef __SYSDEP_LOCKS_H__
+ #define __SYSDEP_LOCKS_H__
+
+ typedef size_t obj_addr_t;  /* Integer type big enough for object     */
+                       /* address.                   */
+
+ // Atomically replace *addr by new_val if it was initially equal to old.
+ // Return true if the comparison succeeded.
+ // Assumed to have acquire semantics, i.e. later memory operations
+ // cannot execute before the compare_and_swap finishes.
+ inline static bool
+ compare_and_swap(volatile obj_addr_t *addr,
+            obj_addr_t old, obj_addr_t new_val)
+ {
+   int result;
+
+   __asm__ __volatile__ (
+ #ifndef __s390x__
+     "       cs  %1,%2,0(%3)\n"
+ #else
+     "       csg %1,%2,0(%3)\n"
+ #endif
+     "       ipm %0\n"
+     "       srl %0,28\n"
+     : "=&d" (result), "+d" (old)
+     : "d" (new_val), "a" (addr)
+     : "cc", "memory");
+
+   return result == 0;
+ }
+
+ // Set *addr to new_val with release semantics, i.e. making sure
+ // that prior loads and stores complete before this
+ // assignment.
+ inline static void
+ release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
+ {
+   __asm__ __volatile__("bcr 15,0" : : : "memory");
+   *(addr) = new_val;
+ }
+
+ // Compare_and_swap with release semantics instead of acquire semantics.
+ // On many architecture, the operation makes both guarantees, so the
+ // implementation can be the same.
+ inline static bool
+ compare_and_swap_release(volatile obj_addr_t *addr,
+                  obj_addr_t old, obj_addr_t new_val)
+ {
+   return compare_and_swap(addr, old, new_val);
+ }
+
+ // Ensure that subsequent instructions do not execute on stale
+ // data that was loaded from memory before the barrier.
+ inline static void
+ read_barrier()
+ {
+   __asm__ __volatile__("bcr 15,0" : : : "memory");
+ }
+
+ // Ensure that prior stores to memory are completed with respect to other
+ // processors.
+ inline static void
+ write_barrier()
+ {
+   __asm__ __volatile__("bcr 15,0" : : : "memory");
+ }
+ #endif


Mit freundlichen Gruessen / Best Regards

Ulrich Weigand

--
  Dr. Ulrich Weigand
  Linux for S/390 Design & Development
  IBM Deutschland Entwicklung GmbH, Schoenaicher Str. 220, 71032 Boeblingen
  Phone: +49-7031/16-3727   ---   Email: Ulrich.Weigand@de.ibm.com