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Xtensa: avoid use of register a7 as a reload register (3.0 version)
- From: Bob Wilson <bwilson at tensilica dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Mon, 30 Sep 2002 13:56:31 -0700
- Subject: Xtensa: avoid use of register a7 as a reload register (3.0 version)
- Organization: Tensilica, Inc.
Here is a version of the patch from
http://gcc.gnu.org/ml/gcc-patches/2002-09/msg01846.html that works for GCC 3.0.
I've already applied this on the 3.0 branch.
2002-09-30 Bob Wilson <bob.wilson@acm.org>
* config/xtensa/xtensa.h (REG_CLASS_NAMES, REG_CLASS_CONTENTS):
Add new RL_REGS register class.
(PREFERRED_RELOAD_CLASS, PREFERRED_OUTPUT_RELOAD_CLASS):
Call xtensa_preferred_reload_class for both input and output reloads.
* config/xtensa/xtensa.c (xtensa_regno_to_class): Use new RL_REGS class.
(xtensa_preferred_reload_class): Handle output reloads; use RL_REGS
instead of either AR_REGS or GR_REGS classes.
(xtensa_secondary_reload_class): Use new RL_REGS class.
* config/xtensa/xtensa-protos.h (xtensa_preferred_reload_class): Update.
Index: config/xtensa/xtensa-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/xtensa/xtensa-protos.h,v
retrieving revision 1.1.4.2
diff -u -r1.1.4.2 xtensa-protos.h
--- config/xtensa/xtensa-protos.h 1 Jul 2002 15:58:44 -0000 1.1.4.2
+++ config/xtensa/xtensa-protos.h 19 Sep 2002 22:31:33 -0000
@@ -1,5 +1,5 @@
/* Prototypes of target machine for GNU compiler for Xtensa.
- Copyright (C) 2001 Free Software Foundation, Inc.
+ Copyright (C) 2001,2002 Free Software Foundation, Inc.
Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
This file is part of GCC.
@@ -88,6 +88,8 @@
extern void xtensa_reorg PARAMS ((rtx));
extern rtx xtensa_return_addr PARAMS ((int, rtx));
extern rtx xtensa_builtin_saveregs PARAMS ((void));
+extern enum reg_class xtensa_preferred_reload_class
+ PARAMS ((rtx, enum reg_class, int));
extern enum reg_class xtensa_secondary_reload_class
PARAMS ((enum reg_class, enum machine_mode, rtx, int));
extern int a7_overlap_mentioned_p PARAMS ((rtx x));
Index: config/xtensa/xtensa.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/xtensa/xtensa.c,v
retrieving revision 1.1.4.2
diff -u -r1.1.4.2 xtensa.c
--- config/xtensa/xtensa.c 1 Jul 2002 15:58:44 -0000 1.1.4.2
+++ config/xtensa/xtensa.c 19 Sep 2002 22:31:33 -0000
@@ -1,5 +1,5 @@
/* Subroutines for insn-output.c for Tensilica's Xtensa architecture.
- Copyright (C) 2001 Free Software Foundation, Inc.
+ Copyright (C) 2001,2002 Free Software Foundation, Inc.
Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
This file is part of GCC.
@@ -112,10 +112,10 @@
/* Map hard register number to register class */
enum reg_class xtensa_regno_to_class[] =
{
- GR_REGS, SP_REG, GR_REGS, GR_REGS,
- GR_REGS, GR_REGS, GR_REGS, GR_REGS,
- GR_REGS, GR_REGS, GR_REGS, GR_REGS,
- GR_REGS, GR_REGS, GR_REGS, GR_REGS,
+ RL_REGS, SP_REG, RL_REGS, RL_REGS,
+ RL_REGS, RL_REGS, RL_REGS, GR_REGS,
+ RL_REGS, RL_REGS, RL_REGS, RL_REGS,
+ RL_REGS, RL_REGS, RL_REGS, RL_REGS,
AR_REGS, AR_REGS, BR_REGS,
FP_REGS, FP_REGS, FP_REGS, FP_REGS,
FP_REGS, FP_REGS, FP_REGS, FP_REGS,
@@ -2570,6 +2570,28 @@
enum reg_class
+xtensa_preferred_reload_class (x, class, isoutput)
+ rtx x;
+ enum reg_class class;
+ int isoutput;
+{
+ if (!isoutput && CONSTANT_P (x) && GET_CODE (x) == CONST_DOUBLE)
+ return NO_REGS;
+
+ /* Don't use the stack pointer or hard frame pointer for reloads!
+ The hard frame pointer would normally be OK except that it may
+ briefly hold an incoming argument in the prologue, and reload
+ won't know that it is live because the hard frame pointer is
+ treated specially. */
+
+ if (class == AR_REGS || class == GR_REGS)
+ return RL_REGS;
+
+ return class;
+}
+
+
+enum reg_class
xtensa_secondary_reload_class (class, mode, x, isoutput)
enum reg_class class;
enum machine_mode mode ATTRIBUTE_UNUSED;
@@ -2585,13 +2607,13 @@
if (!isoutput)
{
if (class == FP_REGS && constantpool_mem_p (x))
- return GR_REGS;
+ return RL_REGS;
}
if (ACC_REG_P (regno))
- return (class == GR_REGS ? NO_REGS : GR_REGS);
+ return ((class == GR_REGS || class == RL_REGS) ? NO_REGS : RL_REGS);
if (class == ACC_REG)
- return (GP_REG_P (regno) ? NO_REGS : GR_REGS);
+ return (GP_REG_P (regno) ? NO_REGS : RL_REGS);
return NO_REGS;
}
Index: config/xtensa/xtensa.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/xtensa/xtensa.h,v
retrieving revision 1.1.4.3
diff -u -r1.1.4.3 xtensa.h
--- config/xtensa/xtensa.h 1 Jul 2002 15:58:44 -0000 1.1.4.3
+++ config/xtensa/xtensa.h 19 Sep 2002 22:31:33 -0000
@@ -1,5 +1,5 @@
/* Definitions of Tensilica's Xtensa target machine for GNU compiler.
- Copyright (C) 2001 Free Software Foundation, Inc.
+ Copyright (C) 2001,2002 Free Software Foundation, Inc.
Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
This file is part of GCC.
@@ -738,6 +738,7 @@
FP_REGS, /* floating point registers */
ACC_REG, /* MAC16 accumulator */
SP_REG, /* sp register (aka a1) */
+ RL_REGS, /* preferred reload regs (not sp or fp) */
GR_REGS, /* integer registers except sp */
AR_REGS, /* all integer registers */
ALL_REGS, /* all registers */
@@ -759,6 +760,7 @@
"FP_REGS", \
"ACC_REG", \
"SP_REG", \
+ "RL_REGS", \
"GR_REGS", \
"AR_REGS", \
"ALL_REGS" \
@@ -782,6 +784,7 @@
{ 0xfff80000, 0x00000007 }, /* floating-point registers */ \
{ 0x00000000, 0x00000008 }, /* MAC16 accumulator */ \
{ 0x00000002, 0x00000000 }, /* stack pointer register */ \
+ { 0x0000ff7d, 0x00000000 }, /* preferred reload registers */ \
{ 0x0000fffd, 0x00000000 }, /* general-purpose registers */ \
{ 0x0003ffff, 0x00000000 }, /* integer registers */ \
{ 0xffffffff, 0x0000000f } /* all registers */ \
@@ -941,12 +944,10 @@
in some cases it is preferable to use a more restrictive class. */
#define PREFERRED_RELOAD_CLASS(X, CLASS) \
- (CONSTANT_P (X) \
- ? (GET_CODE(X) == CONST_DOUBLE) ? NO_REGS : (CLASS) \
- : (CLASS))
+ xtensa_preferred_reload_class (X, CLASS, 0)
#define PREFERRED_OUTPUT_RELOAD_CLASS(X, CLASS) \
- (CLASS)
+ xtensa_preferred_reload_class (X, CLASS, 1)
/* You should define these macros to indicate to the reload phase that
it may need to allocate at least one register for a reload in