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PATCH Fix stack-based accesses in Thumb mode
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Richard dot Earnshaw at arm dot com
- Date: Mon, 30 Sep 2002 12:31:30 +0100
- Subject: PATCH Fix stack-based accesses in Thumb mode
- Organization: ARM Ltd.
- Reply-to: Richard dot Earnshaw at arm dot com
The patch below fixes the vast majority of cases in Thumb mode where we
generate an invalid memory access.
The problem is that we cannot directly access the stack via SP for
anything other than SImode, so the following are all invalid:
[sp, #offset] for QI or HI modes
[sp, reg] anywhere
I don't think the solution below is perfect; indeed it may even lead to
poorer code in some circumstances, but the Thumb load/store addressings
modes are highly non-orthogonal, which makes generating good code very
difficult with the current way that the compiler works. Did anything ever
come of some of those define_addressing_mode proposals?
Fixed as follows (fixes 29 failures in the C part of the testsuite for
-mthumb).
R.
* arm.h (BASE_REG_CLASS): Always return LO_REGS for Thumb.
(MODE_BASE_REG_CLASS, case Thumb): Only return BASE_REGS if we know
that we have a SImode access, and only then if reload hasn't
completed;
for all other cases, use LO_REGS.
Index: arm.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.h,v
retrieving revision 1.163
diff -p -r1.163 arm.h
*** arm.h 24 Sep 2002 16:51:33 -0000 1.163
--- arm.h 30 Sep 2002 11:10:44 -0000
*************** enum reg_class
*** 1070,1083 ****
/* The class value for index registers, and the one for base regs. */
#define INDEX_REG_CLASS (TARGET_THUMB ? LO_REGS : GENERAL_REGS)
! #define BASE_REG_CLASS (TARGET_THUMB ? BASE_REGS : GENERAL_REGS)
! /* For the Thumb the high registers cannot be used as base
! registers when addressing quanitities in QI or HI mode. */
#define MODE_BASE_REG_CLASS(MODE) \
! (TARGET_ARM ? BASE_REGS : \
! (((MODE) == QImode || (MODE) == HImode || (MODE) == VOIDmode) \
! ? LO_REGS : BASE_REGS))
/* When SMALL_REGISTER_CLASSES is nonzero, the compiler allows
registers explicitly used in the rtl to be used as spill registers
--- 1056,1071 ----
/* The class value for index registers, and the one for base regs. */
#define INDEX_REG_CLASS (TARGET_THUMB ? LO_REGS : GENERAL_REGS)
! #define BASE_REG_CLASS (TARGET_THUMB ? LO_REGS : GENERAL_REGS)
! /* For the Thumb the high registers cannot be used as base registers
! when addressing quanitities in QI or HI mode; if we don't know the
! mode, then we must be conservative. After reload we must also be
! conservative, since we can't support SP+reg addressing, and we
! can't fix up any bad substitutions. */
#define MODE_BASE_REG_CLASS(MODE) \
! (TARGET_ARM ? GENERAL_REGS : \
! (((MODE) == SImode && !reload_completed) ? BASE_REGS : LO_REGS))
/* When SMALL_REGISTER_CLASSES is nonzero, the compiler allows
registers explicitly used in the rtl to be used as spill registers