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Re: Performance regression
- From: Roger Sayle <roger at eyesopen dot com>
- To: <Richard dot Earnshaw at arm dot com>
- Cc: Dale Johannesen <dalej at apple dot com>, <gcc at gcc dot gnu dot org>, <gcc-patches at gcc dot gnu dot org>
- Date: Wed, 25 Sep 2002 09:53:26 -0600 (MDT)
- Subject: Re: Performance regression
Richard Earnshaw wrote:
> I found that I got significantly better code on the ARM when I rewrote the
> movqi expander to for load-byte(mem) to use
>
> if (GET_CODE (operands[1]) == MEM && optimize > 0)
> {
> rtx reg = gen_reg_rtx (SImode);
>
> emit_insn (gen_zero_extendqisi2 (reg, operands[1]));
> operands[1] = gen_lowpart (QImode, reg);
> }
>
> Of course, you can only do this during initial expansion (when you can
> create new pseudos). The change meant that we never use implicit
> zero-extension operations so the compiler was able to remove several
> zero-/sign-extend operations which were clearly redundant.
I like this solution. I wasn't sure whether this would work or might
interact strangely with other parts of the compiler, but the ARM
back-end is "proof by implementation".
Roger
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