This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Reclaim 6 target_switches bits for x86
- From: Richard Henderson <rth at twiddle dot net>
- To: gcc-patches at gcc dot gnu dot org
- Date: Mon, 23 Sep 2002 17:27:41 -0700
- Subject: Reclaim 6 target_switches bits for x86
We were completely out, and I needed one. Fortunately,
Richard Sandiford made the _SET bits redundant a while ago.
r~
* config/i386/i386.h (MASK_ACCUMULATE_OUTGOING_ARGS_SET, MASK_MMX_SET,
MASK_SSE_SET, MASK_SSE2_SET, MASK_3DNOW_SET, MASK_3DNOW_A_SET): Kill.
(TARGET_SWITCHES): Don't reference them.
* config/i386/i386.c (override_options): Use target_flags_explicit
to examine bits set by the user.
Index: i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.460
diff -u -p -r1.460 i386.c
--- i386.c 22 Sep 2002 03:15:38 -0000 1.460
+++ i386.c 24 Sep 2002 00:05:37 -0000
@@ -1001,19 +1001,19 @@ override_options ()
/* Default cpu tuning to the architecture. */
ix86_cpu = ix86_arch;
if (processor_alias_table[i].flags & PTA_MMX
- && !(target_flags & MASK_MMX_SET))
+ && !(target_flags_explicit & MASK_MMX))
target_flags |= MASK_MMX;
if (processor_alias_table[i].flags & PTA_3DNOW
- && !(target_flags & MASK_3DNOW_SET))
+ && !(target_flags_explicit & MASK_3DNOW))
target_flags |= MASK_3DNOW;
if (processor_alias_table[i].flags & PTA_3DNOW_A
- && !(target_flags & MASK_3DNOW_A_SET))
+ && !(target_flags_explicit & MASK_3DNOW_A))
target_flags |= MASK_3DNOW_A;
if (processor_alias_table[i].flags & PTA_SSE
- && !(target_flags & MASK_SSE_SET))
+ && !(target_flags_explicit & MASK_SSE))
target_flags |= MASK_SSE;
if (processor_alias_table[i].flags & PTA_SSE2
- && !(target_flags & MASK_SSE2_SET))
+ && !(target_flags_explicit & MASK_SSE2))
target_flags |= MASK_SSE2;
if (processor_alias_table[i].flags & PTA_PREFETCH_SSE)
x86_prefetch_sse = true;
@@ -1236,7 +1236,7 @@ override_options ()
target_flags |= MASK_3DNOW_A;
}
if ((x86_accumulate_outgoing_args & CPUMASK)
- && !(target_flags & MASK_ACCUMULATE_OUTGOING_ARGS_SET)
+ && !(target_flags_explicit & MASK_ACCUMULATE_OUTGOING_ARGS)
&& !optimize_size)
target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
Index: i386.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.h,v
retrieving revision 1.288
diff -u -p -r1.288 i386.h
--- i386.h 22 Sep 2002 03:15:38 -0000 1.288
+++ i386.h 24 Sep 2002 00:05:39 -0000
@@ -105,19 +105,16 @@ extern int target_flags;
#define MASK_INLINE_ALL_STROPS 0x00000400 /* Inline stringops in all cases */
#define MASK_NO_PUSH_ARGS 0x00000800 /* Use push instructions */
#define MASK_ACCUMULATE_OUTGOING_ARGS 0x00001000/* Accumulate outgoing args */
-#define MASK_ACCUMULATE_OUTGOING_ARGS_SET 0x00002000
-#define MASK_MMX 0x00004000 /* Support MMX regs/builtins */
-#define MASK_MMX_SET 0x00008000
-#define MASK_SSE 0x00010000 /* Support SSE regs/builtins */
-#define MASK_SSE_SET 0x00020000
-#define MASK_SSE2 0x00040000 /* Support SSE2 regs/builtins */
-#define MASK_SSE2_SET 0x00080000
-#define MASK_3DNOW 0x00100000 /* Support 3Dnow builtins */
-#define MASK_3DNOW_SET 0x00200000
-#define MASK_3DNOW_A 0x00400000 /* Support Athlon 3Dnow builtins */
-#define MASK_3DNOW_A_SET 0x00800000
-#define MASK_128BIT_LONG_DOUBLE 0x01000000 /* long double size is 128bit */
-#define MASK_64BIT 0x02000000 /* Produce 64bit code */
+#define MASK_MMX 0x00002000 /* Support MMX regs/builtins */
+#define MASK_SSE 0x00004000 /* Support SSE regs/builtins */
+#define MASK_SSE2 0x00008000 /* Support SSE2 regs/builtins */
+#define MASK_3DNOW 0x00010000 /* Support 3Dnow builtins */
+#define MASK_3DNOW_A 0x00020000 /* Support Athlon 3Dnow builtins */
+#define MASK_128BIT_LONG_DOUBLE 0x00040000 /* long double size is 128bit */
+#define MASK_64BIT 0x00080000 /* Produce 64bit code */
+
+/* Unused: 0x03f0000 */
+
/* ... overlap with subtarget options starts by 0x04000000. */
#define MASK_NO_RED_ZONE 0x04000000 /* Do not use red zone */
@@ -334,30 +331,25 @@ extern int x86_prefetch_sse;
N_("Use push instructions to save outgoing arguments") }, \
{ "no-push-args", MASK_NO_PUSH_ARGS, \
N_("Do not use push instructions to save outgoing arguments") }, \
- { "accumulate-outgoing-args", (MASK_ACCUMULATE_OUTGOING_ARGS \
- | MASK_ACCUMULATE_OUTGOING_ARGS_SET), \
+ { "accumulate-outgoing-args", MASK_ACCUMULATE_OUTGOING_ARGS, \
N_("Use push instructions to save outgoing arguments") }, \
- { "no-accumulate-outgoing-args",MASK_ACCUMULATE_OUTGOING_ARGS_SET, \
+ { "no-accumulate-outgoing-args",-MASK_ACCUMULATE_OUTGOING_ARGS, \
N_("Do not use push instructions to save outgoing arguments") }, \
- { "mmx", MASK_MMX | MASK_MMX_SET, \
+ { "mmx", MASK_MMX, \
N_("Support MMX built-in functions") }, \
{ "no-mmx", -MASK_MMX, \
N_("Do not support MMX built-in functions") }, \
- { "no-mmx", MASK_MMX_SET, "" }, \
- { "3dnow", MASK_3DNOW | MASK_3DNOW_SET, \
+ { "3dnow", MASK_3DNOW, \
N_("Support 3DNow! built-in functions") }, \
- { "no-3dnow", -MASK_3DNOW, "" }, \
- { "no-3dnow", MASK_3DNOW_SET, \
+ { "no-3dnow", -MASK_3DNOW, \
N_("Do not support 3DNow! built-in functions") }, \
- { "sse", MASK_SSE | MASK_SSE_SET, \
+ { "sse", MASK_SSE, \
N_("Support MMX and SSE built-in functions and code generation") }, \
- { "no-sse", -MASK_SSE, "" }, \
- { "no-sse", MASK_SSE_SET, \
+ { "no-sse", -MASK_SSE, \
N_("Do not support MMX and SSE built-in functions and code generation") },\
- { "sse2", MASK_SSE2 | MASK_SSE2_SET, \
+ { "sse2", MASK_SSE2, \
N_("Support MMX, SSE and SSE2 built-in functions and code generation") }, \
- { "no-sse2", -MASK_SSE2, "" }, \
- { "no-sse2", MASK_SSE2_SET, \
+ { "no-sse2", -MASK_SSE2, \
N_("Do not support MMX, SSE and SSE2 built-in functions and code generation") }, \
{ "128bit-long-double", MASK_128BIT_LONG_DOUBLE, \
N_("sizeof(long double) is 16") }, \