This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Fix PR optimization/7520


On Thu, Sep 19, 2002 at 09:50:47PM +0200, Eric Botcazou wrote:
> (insn:HI 38 96 39 1 0x40188814 (parallel [
>             (set (reg:CCZ 17 flags)
>                 (compare:CCZ (ior:SI (reg:SI 0 eax)
>                         (reg:SI 2 ecx [61]))
>                     (const_int 0 [0x0])))
>             (clobber (reg:SI 0 eax))
>         ]) 217 {*iorsi_3} (insn_list 97 (insn_list 96 (nil)))
>     (expr_list:REG_DEAD (reg:SI 0 eax)
>         (nil)))
> 
> regardless of what follows, in particular:
> 
> ;; End of basic block 1, registers live:
>  0 [ax] 2 [cx] 3 [bx] 6 [bp] 7 [sp] 16 [] 20 [frame]  ?

If eax is live after this instruction in this block, with
no other uses, that is wrong.


r~


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]