Re: [patch] new cpu sr71k

["Mark D. Baushke" <mdb at gnu dot org>]

> To: echristo@redhat.com
> cc: gcc-patches@gcc.gnu.org
> Subject: Re: [patch] new cpu sr71k
> From: cgd@broadcom.com
> Date: 13 Sep 2002 10:26:46 -0700
> 
> So, e-mail from somebody gave me some cause to look further at this
> patch:
> 
> At Fri, 16 Aug 2002 07:37:13 +0000 (UTC), "Eric Christopher" wrote:
> > -#define GENERATE_BRANCHLIKELY   (TARGET_BRANCHLIKELY && !TARGET_MIPS16)
> > +#define GENERATE_BRANCHLIKELY   (TARGET_BRANCHLIKELY                    \
> > +				 && !TARGET_SR71K                       \
> > +				 && !TARGET_MIPS16)
> 
> I don't understand why that's the right thing.
> 
> If SR71K doesn't support branch-likely instructions at all or they are
> buggy on that processor, a conditional should be added
> ISA_HAS_BRANCHLIKELY.

Yes, that is my understanding as well.

> If SR71K does have them, but prefers to not use them (regardless of
> the "MIPS ISA level" selected, i.e. regardless of ISA_MIPSnn), then
> that should be expressed in mips.c ca. line 5211, probably w/ a
> reference to a TUNE_* var.

Agreed again.

> (Users should be able to use -mbranch-likely to override the default,
> which this patch does not allow.)

Hmmm... If the cpu does not support any branch-likely instructions, then
even use of -mbranch-likely should not generate those instructions, but
that could be encoded in 

  #define ISA_HAS_BRANCHLIKELY (!ISA_MIPA1 && !TARGETSR71K)

if that is the case.

> (It occurs to me that I should add TUNE_SB1 into the code in mips.c,
> to express a preference regardless of ISA_*.)
>
> thoughts?

Possibly. If someone uses -mtune=sb1 does that mean that instructions
that would stop any of the other mips variants from working properly
should be chosen? I didn't think that was the purpose. For that you
would want to sue -march=sb1 right?

	-- Mark