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[PATCH] New fp register predicates for i386.md
- From: Roger Sayle <roger at eyesopen dot com>
- To: <gcc-patches at gcc dot gnu dot org>
- Cc: Andreas Jaeger <aj at suse dot de>
- Date: Tue, 10 Sep 2002 15:21:57 -0600 (MDT)
- Subject: [PATCH] New fp register predicates for i386.md
Graham Stott is currently flying en route to the Far East, but
before he left he kindly provided the latest version of his patch
to fix the --enable-checking bootstrap failures on IA-32.
The original version of this patch was posted by Graham back in July,
as "i386.md patch fix enable-checking bootstrap failure".
http://gcc.gnu.org/ml/gcc-patches/2002-07/msg01753.html
During review, Richard Henderson suggested that a better fix to the
problem was to add new fp register predicates to the i386 backend.
http://gcc.gnu.org/ml/gcc-patches/2002-08/msg00107.html
http://gcc.gnu.org/ml/gcc-patches/2002-08/msg00108.html
http://gcc.gnu.org/ml/gcc-patches/2002-08/msg00113.html
The following patch is the result of those changes. As I
mentioned above, Graham Stott wrote the patch itself, and
my minor contribution was to add comments above the new
functions and provide a ChangeLog entry. Hopefully this
can be approved as is, as I'm not sure I could fix much.
I've tested the patch with a complete "make bootstrap" and
"make -k check", all languages except Ada and treelang, on
i686-pc-linux-gnu with no new regressions. I've just
started an enable-checking bootstrap to confirm that it
actually fixes the mainline bootstrap failure.
Ok for mainline?
2002-09-10 Graham Stott <graham.stott@btinternet.com>
* i386.c (any_fp_register_operand, fp_register_operand,
register_and_not_any_fp_reg_operand, register_and_not_fp_reg_operand):
New predicate functions.
* i386-protos.h: Add their prototypes.
* i386.h: Add them to PREDICATE_CODES.
* i386.md ("*pushsf_rex64"+2, "*pushsf_rex64"+3, "*pushdf_integer"+1,
"*pushdf_integer"+2, "*pushtf_integer"+1, "*pushtf_integer"+2,
"*pushtf_integer"+3, "*pushtf_integer"+4, "*dummy_extendsfdf2"+1,
"*dummy_extendsfdf2"+2, "*dummy_extendsfxf2"+1,
"*dummy_extendsftf2"+1, "*dummy_extendsftf2"+2,
"*dummy_extenddfxf2"+1, "*dummy_extenddftf2"+1,
"*dummy_extenddftf2"+2, "*negsf2_if"+1, "*negsf2_if"+2,
"*negdf2_if_rex64"+1, "*negdf2_if_rex64"+2, "*negxf2_if"+1,
"*negxf2_if"+2, "*negtf2_if"+1, "*negtf2_if"+2, "*abssf2_if"+1,
"*abssf2_if"+2, "*absdf2_if_rex64"+1, "*absdf2_if_rex64"+2,
"*absxf2_if"+1, "*absxf2_if"+2, "*abstf2_if"+1, "*abstf2_if"+2):
Use these new predicates to simplify and correct the use of
FP_REG_P, ANY_FP_REG_P, FP_REGNO_P and any ANY_FP_REGNO_P.
Index: i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.454
diff -c -3 -p -r1.454 i386.c
*** i386.c 9 Sep 2002 11:00:51 -0000 1.454
--- i386.c 10 Sep 2002 12:36:18 -0000
*************** ix86_va_arg (valist, type)
*** 2754,2759 ****
--- 2754,2796 ----
return addr_rtx;
}
+ /* Return nonzero if OP is either a i387 or SSE fp register. */
+ int
+ any_fp_register_operand (op, mode)
+ rtx op;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
+ {
+ return ANY_FP_REG_P (op);
+ }
+
+ /* Return nonzero if OP is an i387 fp register. */
+ int
+ fp_register_operand (op, mode)
+ rtx op;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
+ {
+ return FP_REG_P (op);
+ }
+
+ /* Return nonzero if OP is a non-fp register_operand. */
+ int
+ register_and_not_any_fp_reg_operand (op, mode)
+ rtx op;
+ enum machine_mode mode;
+ {
+ return register_operand (op, mode) && !ANY_FP_REG_P (op);
+ }
+
+ /* Return nonzero of OP is a register operand other than an
+ i387 fp register. */
+ int
+ register_and_not_fp_reg_operand (op, mode)
+ rtx op;
+ enum machine_mode mode;
+ {
+ return register_operand (op, mode) && !FP_REG_P (op);
+ }
+
/* Return nonzero if OP is general operand representable on x86_64. */
int
Index: i386-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386-protos.h,v
retrieving revision 1.78
diff -c -3 -p -r1.78 i386-protos.h
*** i386-protos.h 8 Sep 2002 18:36:53 -0000 1.78
--- i386-protos.h 10 Sep 2002 12:36:18 -0000
*************** extern int standard_80387_constant_p PAR
*** 42,47 ****
--- 42,53 ----
extern int standard_sse_constant_p PARAMS ((rtx));
extern int symbolic_reference_mentioned_p PARAMS ((rtx));
+ extern int any_fp_register_operand PARAMS ((rtx, enum machine_mode));
+ extern int register_and_not_any_fp_reg_operand PARAMS ((rtx, enum machine_mode));
+
+ extern int fp_register_operand PARAMS ((rtx, enum machine_mode));
+ extern int register_and_not_fp_reg_operand PARAMS ((rtx, enum machine_mode));
+
extern int x86_64_general_operand PARAMS ((rtx, enum machine_mode));
extern int x86_64_szext_general_operand PARAMS ((rtx, enum machine_mode));
extern int x86_64_nonmemory_operand PARAMS ((rtx, enum machine_mode));
Index: i386.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.h,v
retrieving revision 1.284
diff -c -3 -p -r1.284 i386.h
*** i386.h 9 Sep 2002 11:00:52 -0000 1.284
--- i386.h 10 Sep 2002 12:36:19 -0000
*************** do { \
*** 3203,3209 ****
{"global_dynamic_symbolic_operand", {SYMBOL_REF}}, \
{"local_dynamic_symbolic_operand", {SYMBOL_REF}}, \
{"initial_exec_symbolic_operand", {SYMBOL_REF}}, \
! {"local_exec_symbolic_operand", {SYMBOL_REF}},
/* A list of predicates that do special things with modes, and so
should not elicit warnings for VOIDmode match_operand. */
--- 3203,3213 ----
{"global_dynamic_symbolic_operand", {SYMBOL_REF}}, \
{"local_dynamic_symbolic_operand", {SYMBOL_REF}}, \
{"initial_exec_symbolic_operand", {SYMBOL_REF}}, \
! {"local_exec_symbolic_operand", {SYMBOL_REF}}, \
! {"any_fp_register_operand", {REG}}, \
! {"register_and_not_any_fp_reg_operand", {REG}}, \
! {"fp_register_operand", {REG}}, \
! {"register_and_not_fp_reg_operand", {REG}}, \
/* A list of predicates that do special things with modes, and so
should not elicit warnings for VOIDmode match_operand. */
Index: i386.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.382
diff -c -3 -p -r1.382 i386.md
*** i386.md 9 Sep 2002 11:00:51 -0000 1.382
--- i386.md 10 Sep 2002 12:36:27 -0000
***************
*** 2077,2091 ****
;; %%% Kill this when call knows how to work this out.
(define_split
[(set (match_operand:SF 0 "push_operand" "")
! (match_operand:SF 1 "register_operand" ""))]
! "!TARGET_64BIT && ANY_FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -4)))
(set (mem:SF (reg:SI 7)) (match_dup 1))])
(define_split
[(set (match_operand:SF 0 "push_operand" "")
! (match_operand:SF 1 "register_operand" ""))]
! "TARGET_64BIT && ANY_FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:DI 7) (plus:DI (reg:DI 7) (const_int -8)))
(set (mem:SF (reg:DI 7)) (match_dup 1))])
--- 2077,2091 ----
;; %%% Kill this when call knows how to work this out.
(define_split
[(set (match_operand:SF 0 "push_operand" "")
! (match_operand:SF 1 "fp_register_operand" ""))]
! "!TARGET_64BIT"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -4)))
(set (mem:SF (reg:SI 7)) (match_dup 1))])
(define_split
[(set (match_operand:SF 0 "push_operand" "")
! (match_operand:SF 1 "fp_register_operand" ""))]
! "TARGET_64BIT"
[(set (reg:DI 7) (plus:DI (reg:DI 7) (const_int -8)))
(set (mem:SF (reg:DI 7)) (match_dup 1))])
***************
*** 2249,2264 ****
;; %%% Kill this when call knows how to work this out.
(define_split
[(set (match_operand:DF 0 "push_operand" "")
! (match_operand:DF 1 "register_operand" ""))]
! "!TARGET_64BIT && reload_completed && ANY_FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -8)))
(set (mem:DF (reg:SI 7)) (match_dup 1))]
"")
(define_split
[(set (match_operand:DF 0 "push_operand" "")
! (match_operand:DF 1 "register_operand" ""))]
! "TARGET_64BIT && reload_completed && ANY_FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:DI 7) (plus:DI (reg:DI 7) (const_int -8)))
(set (mem:DF (reg:DI 7)) (match_dup 1))]
"")
--- 2249,2264 ----
;; %%% Kill this when call knows how to work this out.
(define_split
[(set (match_operand:DF 0 "push_operand" "")
! (match_operand:DF 1 "fp_register_operand" ""))]
! "!TARGET_64BIT && reload_completed"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -8)))
(set (mem:DF (reg:SI 7)) (match_dup 1))]
"")
(define_split
[(set (match_operand:DF 0 "push_operand" "")
! (match_operand:DF 1 "fp_register_operand" ""))]
! "TARGET_64BIT && reload_completed"
[(set (reg:DI 7) (plus:DI (reg:DI 7) (const_int -8)))
(set (mem:DF (reg:DI 7)) (match_dup 1))]
"")
***************
*** 2568,2595 ****
&& (GET_MODE (operands[0]) == XFmode
|| GET_MODE (operands[0]) == TFmode
|| GET_MODE (operands[0]) == DFmode)
! && (!REG_P (operands[1]) || !ANY_FP_REGNO_P (REGNO (operands[1])))"
[(const_int 0)]
"ix86_split_long_move (operands); DONE;")
(define_split
[(set (match_operand:XF 0 "push_operand" "")
! (match_operand:XF 1 "register_operand" ""))]
! "!TARGET_64BIT && ANY_FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -12)))
(set (mem:XF (reg:SI 7)) (match_dup 1))])
(define_split
[(set (match_operand:TF 0 "push_operand" "")
! (match_operand:TF 1 "register_operand" ""))]
! "!TARGET_64BIT && ANY_FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -16)))
(set (mem:TF (reg:SI 7)) (match_dup 1))])
(define_split
[(set (match_operand:TF 0 "push_operand" "")
! (match_operand:TF 1 "register_operand" ""))]
! "TARGET_64BIT && ANY_FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:DI 7) (plus:DI (reg:DI 7) (const_int -16)))
(set (mem:TF (reg:DI 7)) (match_dup 1))])
--- 2568,2595 ----
&& (GET_MODE (operands[0]) == XFmode
|| GET_MODE (operands[0]) == TFmode
|| GET_MODE (operands[0]) == DFmode)
! && !ANY_FP_REG_P (operands[1])"
[(const_int 0)]
"ix86_split_long_move (operands); DONE;")
(define_split
[(set (match_operand:XF 0 "push_operand" "")
! (match_operand:XF 1 "fp_register_operand" ""))]
! "!TARGET_64BIT"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -12)))
(set (mem:XF (reg:SI 7)) (match_dup 1))])
(define_split
[(set (match_operand:TF 0 "push_operand" "")
! (match_operand:TF 1 "fp_register_operand" ""))]
! "!TARGET_64BIT"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -16)))
(set (mem:TF (reg:SI 7)) (match_dup 1))])
(define_split
[(set (match_operand:TF 0 "push_operand" "")
! (match_operand:TF 1 "fp_register_operand" ""))]
! "TARGET_64BIT"
[(set (reg:DI 7) (plus:DI (reg:DI 7) (const_int -16)))
(set (mem:TF (reg:DI 7)) (match_dup 1))])
***************
*** 3341,3355 ****
(define_split
[(set (match_operand:DF 0 "push_operand" "")
! (float_extend:DF (match_operand:SF 1 "register_operand" "")))]
! "!TARGET_64BIT && FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -8)))
(set (mem:DF (reg:SI 7)) (float_extend:DF (match_dup 1)))])
(define_split
[(set (match_operand:DF 0 "push_operand" "")
! (float_extend:DF (match_operand:SF 1 "register_operand" "")))]
! "TARGET_64BIT && FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:DI 7) (plus:DI (reg:DI 7) (const_int -8)))
(set (mem:DF (reg:DI 7)) (float_extend:DF (match_dup 1)))])
--- 3341,3355 ----
(define_split
[(set (match_operand:DF 0 "push_operand" "")
! (float_extend:DF (match_operand:SF 1 "fp_register_operand" "")))]
! "!TARGET_64BIT"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -8)))
(set (mem:DF (reg:SI 7)) (float_extend:DF (match_dup 1)))])
(define_split
[(set (match_operand:DF 0 "push_operand" "")
! (float_extend:DF (match_operand:SF 1 "fp_register_operand" "")))]
! "TARGET_64BIT"
[(set (reg:DI 7) (plus:DI (reg:DI 7) (const_int -8)))
(set (mem:DF (reg:DI 7)) (float_extend:DF (match_dup 1)))])
***************
*** 3361,3368 ****
(define_split
[(set (match_operand:XF 0 "push_operand" "")
! (float_extend:XF (match_operand:SF 1 "register_operand" "")))]
! "!TARGET_64BIT && FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -12)))
(set (mem:XF (reg:SI 7)) (float_extend:XF (match_dup 1)))])
--- 3361,3368 ----
(define_split
[(set (match_operand:XF 0 "push_operand" "")
! (float_extend:XF (match_operand:SF 1 "fp_register_operand" "")))]
! "!TARGET_64BIT"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -12)))
(set (mem:XF (reg:SI 7)) (float_extend:XF (match_dup 1)))])
***************
*** 3374,3388 ****
(define_split
[(set (match_operand:TF 0 "push_operand" "")
! (float_extend:TF (match_operand:SF 1 "register_operand" "")))]
! "!TARGET_64BIT && FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -16)))
(set (mem:TF (reg:SI 7)) (float_extend:TF (match_dup 1)))])
(define_split
[(set (match_operand:TF 0 "push_operand" "")
! (float_extend:TF (match_operand:SF 1 "register_operand" "")))]
! "TARGET_64BIT && FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:DI 7) (plus:DI (reg:DI 7) (const_int -16)))
(set (mem:DF (reg:DI 7)) (float_extend:TF (match_dup 1)))])
--- 3374,3388 ----
(define_split
[(set (match_operand:TF 0 "push_operand" "")
! (float_extend:TF (match_operand:SF 1 "fp_register_operand" "")))]
! "!TARGET_64BIT"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -16)))
(set (mem:TF (reg:SI 7)) (float_extend:TF (match_dup 1)))])
(define_split
[(set (match_operand:TF 0 "push_operand" "")
! (float_extend:TF (match_operand:SF 1 "fp_register_operand" "")))]
! "TARGET_64BIT"
[(set (reg:DI 7) (plus:DI (reg:DI 7) (const_int -16)))
(set (mem:DF (reg:DI 7)) (float_extend:TF (match_dup 1)))])
***************
*** 3394,3401 ****
(define_split
[(set (match_operand:XF 0 "push_operand" "")
! (float_extend:XF (match_operand:DF 1 "register_operand" "")))]
! "!TARGET_64BIT && FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -12)))
(set (mem:DF (reg:SI 7)) (float_extend:XF (match_dup 1)))])
--- 3394,3401 ----
(define_split
[(set (match_operand:XF 0 "push_operand" "")
! (float_extend:XF (match_operand:DF 1 "fp_register_operand" "")))]
! "!TARGET_64BIT"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -12)))
(set (mem:DF (reg:SI 7)) (float_extend:XF (match_dup 1)))])
***************
*** 3407,3421 ****
(define_split
[(set (match_operand:TF 0 "push_operand" "")
! (float_extend:TF (match_operand:DF 1 "register_operand" "")))]
! "!TARGET_64BIT && FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -16)))
(set (mem:TF (reg:SI 7)) (float_extend:XF (match_dup 1)))])
(define_split
[(set (match_operand:TF 0 "push_operand" "")
! (float_extend:TF (match_operand:DF 1 "register_operand" "")))]
! "TARGET_64BIT && FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:DI 7) (plus:DI (reg:DI 7) (const_int -16)))
(set (mem:TF (reg:DI 7)) (float_extend:TF (match_dup 1)))])
--- 3407,3421 ----
(define_split
[(set (match_operand:TF 0 "push_operand" "")
! (float_extend:TF (match_operand:DF 1 "fp_register_operand" "")))]
! "!TARGET_64BIT"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -16)))
(set (mem:TF (reg:SI 7)) (float_extend:XF (match_dup 1)))])
(define_split
[(set (match_operand:TF 0 "push_operand" "")
! (float_extend:TF (match_operand:DF 1 "fp_register_operand" "")))]
! "TARGET_64BIT"
[(set (reg:DI 7) (plus:DI (reg:DI 7) (const_int -16)))
(set (mem:TF (reg:DI 7)) (float_extend:TF (match_dup 1)))])
***************
*** 3788,3797 ****
(define_split
[(set (match_operand:SF 0 "register_operand" "")
(float_truncate:SF
! (match_operand:DF 1 "register_operand" "")))
(clobber (match_operand:SF 2 "memory_operand" ""))]
! "TARGET_80387 && reload_completed
! && FP_REG_P (operands[1])"
[(set (match_dup 2) (float_truncate:SF (match_dup 1)))
(set (match_dup 0) (match_dup 2))]
"")
--- 3788,3796 ----
(define_split
[(set (match_operand:SF 0 "register_operand" "")
(float_truncate:SF
! (match_operand:DF 1 "fp_register_operand" "")))
(clobber (match_operand:SF 2 "memory_operand" ""))]
! "TARGET_80387 && reload_completed"
[(set (match_dup 2) (float_truncate:SF (match_dup 1)))
(set (match_dup 0) (match_dup 2))]
"")
***************
*** 4670,4679 ****
;; %%% Kill these when reload knows how to do it.
(define_split
! [(set (match_operand 0 "register_operand" "")
(float (match_operand 1 "register_operand" "")))]
! "reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))
! && FP_REG_P (operands[0])"
[(const_int 0)]
{
operands[2] = ix86_force_to_memory (GET_MODE (operands[1]), operands[1]);
--- 4669,4677 ----
;; %%% Kill these when reload knows how to do it.
(define_split
! [(set (match_operand 0 "fp_register_operand" "")
(float (match_operand 1 "register_operand" "")))]
! "reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))"
[(const_int 0)]
{
operands[2] = ix86_force_to_memory (GET_MODE (operands[1]), operands[1]);
***************
*** 9348,9366 ****
"#")
(define_split
! [(set (match_operand:SF 0 "register_operand" "")
(neg:SF (match_operand:SF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && FP_REGNO_P (REGNO (operands[0])) && reload_completed"
[(set (match_dup 0)
(neg:SF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:SF 0 "register_operand" "")
(neg:SF (match_operand:SF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed && !FP_REGNO_P (REGNO (operands[0]))"
[(parallel [(set (match_dup 0) (xor:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = gen_int_mode (0x80000000, SImode);
--- 9346,9364 ----
"#")
(define_split
! [(set (match_operand:SF 0 "fp_register_operand" "")
(neg:SF (match_operand:SF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed"
[(set (match_dup 0)
(neg:SF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:SF 0 "register_and_not_fp_reg_operand" "")
(neg:SF (match_operand:SF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed"
[(parallel [(set (match_dup 0) (xor:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = gen_int_mode (0x80000000, SImode);
***************
*** 9523,9542 ****
"#")
(define_split
! [(set (match_operand:DF 0 "register_operand" "")
(neg:DF (match_operand:DF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && FP_REGNO_P (REGNO (operands[0])) && reload_completed"
[(set (match_dup 0)
(neg:DF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:DF 0 "register_operand" "")
(neg:DF (match_operand:DF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "!TARGET_64BIT && TARGET_80387 && reload_completed
! && !FP_REGNO_P (REGNO (operands[0]))"
[(parallel [(set (match_dup 3) (xor:SI (match_dup 3) (match_dup 4)))
(clobber (reg:CC 17))])]
"operands[4] = gen_int_mode (0x80000000, SImode);
--- 9521,9539 ----
"#")
(define_split
! [(set (match_operand:DF 0 "fp_register_operand" "")
(neg:DF (match_operand:DF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed"
[(set (match_dup 0)
(neg:DF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:DF 0 "register_and_not_fp_reg_operand" "")
(neg:DF (match_operand:DF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "!TARGET_64BIT && TARGET_80387 && reload_completed"
[(parallel [(set (match_dup 3) (xor:SI (match_dup 3) (match_dup 4)))
(clobber (reg:CC 17))])]
"operands[4] = gen_int_mode (0x80000000, SImode);
***************
*** 9568,9586 ****
"#")
(define_split
! [(set (match_operand:XF 0 "register_operand" "")
(neg:XF (match_operand:XF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && FP_REGNO_P (REGNO (operands[0])) && reload_completed"
[(set (match_dup 0)
(neg:XF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:XF 0 "register_operand" "")
(neg:XF (match_operand:XF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed && !FP_REGNO_P (REGNO (operands[0]))"
[(parallel [(set (match_dup 0) (xor:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = GEN_INT (0x8000);
--- 9565,9583 ----
"#")
(define_split
! [(set (match_operand:XF 0 "fp_register_operand" "")
(neg:XF (match_operand:XF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed"
[(set (match_dup 0)
(neg:XF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:XF 0 "register_and_not_fp_reg_operand" "")
(neg:XF (match_operand:XF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed"
[(parallel [(set (match_dup 0) (xor:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = GEN_INT (0x8000);
***************
*** 9598,9616 ****
"#")
(define_split
! [(set (match_operand:TF 0 "register_operand" "")
(neg:TF (match_operand:TF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && FP_REGNO_P (REGNO (operands[0])) && reload_completed"
[(set (match_dup 0)
(neg:TF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:TF 0 "register_operand" "")
(neg:TF (match_operand:TF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed && !FP_REGNO_P (REGNO (operands[0]))"
[(parallel [(set (match_dup 0) (xor:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = GEN_INT (0x8000);
--- 9595,9613 ----
"#")
(define_split
! [(set (match_operand:TF 0 "fp_register_operand" "")
(neg:TF (match_operand:TF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed"
[(set (match_dup 0)
(neg:TF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:TF 0 "register_and_not_fp_reg_operand" "")
(neg:TF (match_operand:TF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed"
[(parallel [(set (match_dup 0) (xor:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = GEN_INT (0x8000);
***************
*** 9798,9816 ****
"#")
(define_split
! [(set (match_operand:SF 0 "register_operand" "")
(abs:SF (match_operand:SF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && FP_REGNO_P (REGNO (operands[0]))"
[(set (match_dup 0)
(abs:SF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:SF 0 "register_operand" "")
(abs:SF (match_operand:SF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed && !FP_REGNO_P (REGNO (operands[0]))"
[(parallel [(set (match_dup 0) (and:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = gen_int_mode (~0x80000000, SImode);
--- 9795,9813 ----
"#")
(define_split
! [(set (match_operand:SF 0 "fp_register_operand" "")
(abs:SF (match_operand:SF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387"
[(set (match_dup 0)
(abs:SF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:SF 0 "register_and_not_fp_reg_operand" "")
(abs:SF (match_operand:SF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed"
[(parallel [(set (match_dup 0) (and:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = gen_int_mode (~0x80000000, SImode);
***************
*** 9951,9970 ****
"#")
(define_split
! [(set (match_operand:DF 0 "register_operand" "")
(abs:DF (match_operand:DF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && FP_REGNO_P (REGNO (operands[0])) && reload_completed"
[(set (match_dup 0)
(abs:DF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:DF 0 "register_operand" "")
(abs:DF (match_operand:DF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "!TARGET_64BIT && TARGET_80387 && reload_completed &&
! !FP_REGNO_P (REGNO (operands[0]))"
[(parallel [(set (match_dup 3) (and:SI (match_dup 3) (match_dup 4)))
(clobber (reg:CC 17))])]
"operands[4] = gen_int_mode (~0x80000000, SImode);
--- 9948,9966 ----
"#")
(define_split
! [(set (match_operand:DF 0 "fp_register_operand" "")
(abs:DF (match_operand:DF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed"
[(set (match_dup 0)
(abs:DF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:DF 0 "register_and_not_fp_reg_operand" "")
(abs:DF (match_operand:DF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "!TARGET_64BIT && TARGET_80387 && reload_completed"
[(parallel [(set (match_dup 3) (and:SI (match_dup 3) (match_dup 4)))
(clobber (reg:CC 17))])]
"operands[4] = gen_int_mode (~0x80000000, SImode);
***************
*** 9996,10014 ****
"#")
(define_split
! [(set (match_operand:XF 0 "register_operand" "")
(abs:XF (match_operand:XF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && FP_REGNO_P (REGNO (operands[0])) && reload_completed"
[(set (match_dup 0)
(abs:XF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:XF 0 "register_operand" "")
(abs:XF (match_operand:XF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed && !FP_REGNO_P (REGNO (operands[0]))"
[(parallel [(set (match_dup 0) (and:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = GEN_INT (~0x8000);
--- 9992,10010 ----
"#")
(define_split
! [(set (match_operand:XF 0 "fp_register_operand" "")
(abs:XF (match_operand:XF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed"
[(set (match_dup 0)
(abs:XF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:XF 0 "register_and_not_fp_reg_operand" "")
(abs:XF (match_operand:XF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed"
[(parallel [(set (match_dup 0) (and:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = GEN_INT (~0x8000);
***************
*** 10023,10041 ****
"#")
(define_split
! [(set (match_operand:TF 0 "register_operand" "")
(abs:TF (match_operand:TF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && FP_REGNO_P (REGNO (operands[0])) && reload_completed"
[(set (match_dup 0)
(abs:TF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:TF 0 "register_operand" "")
(abs:TF (match_operand:TF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed && !FP_REGNO_P (REGNO (operands[0]))"
[(parallel [(set (match_dup 0) (and:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = GEN_INT (~0x8000);
--- 10019,10037 ----
"#")
(define_split
! [(set (match_operand:TF 0 "fp_register_operand" "")
(abs:TF (match_operand:TF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed"
[(set (match_dup 0)
(abs:TF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:TF 0 "register_and_not_fp_reg_operand" "")
(abs:TF (match_operand:TF 1 "register_operand" "")))
(clobber (reg:CC 17))]
! "TARGET_80387 && reload_completed"
[(parallel [(set (match_dup 0) (and:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = GEN_INT (~0x8000);
***************
*** 15983,15994 ****
(set_attr "mode" "DF")])
(define_split
! [(set (match_operand:DF 0 "register_operand" "")
(if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
[(match_operand 4 "" "") (const_int 0)])
(match_operand:DF 2 "nonimmediate_operand" "")
(match_operand:DF 3 "nonimmediate_operand" "")))]
! "!TARGET_64BIT && !ANY_FP_REG_P (operands[0]) && reload_completed"
[(set (match_dup 2)
(if_then_else:SI (match_op_dup 1 [(match_dup 4) (const_int 0)])
(match_dup 5)
--- 15979,15990 ----
(set_attr "mode" "DF")])
(define_split
! [(set (match_operand:DF 0 "register_and_not_fp_reg_operand" "")
(if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
[(match_operand 4 "" "") (const_int 0)])
(match_operand:DF 2 "nonimmediate_operand" "")
(match_operand:DF 3 "nonimmediate_operand" "")))]
! "!TARGET_64BIT && reload_completed"
[(set (match_dup 2)
(if_then_else:SI (match_op_dup 1 [(match_dup 4) (const_int 0)])
(match_dup 5)
***************
*** 16096,16108 ****
;; We can't represent the LT test directly. Do this by swapping the operands.
(define_split
! [(set (match_operand:SF 0 "register_operand" "")
(if_then_else:SF (lt (match_operand:SF 1 "register_operand" "")
(match_operand:SF 2 "register_operand" ""))
(match_operand:SF 3 "register_operand" "")
(match_operand:SF 4 "register_operand" "")))
(clobber (reg:CC 17))]
! "FP_REG_P (operands[0]) && reload_completed
&& ((operands_match_p (operands[1], operands[3])
&& operands_match_p (operands[2], operands[4]))
|| (operands_match_p (operands[1], operands[4])
--- 16092,16104 ----
;; We can't represent the LT test directly. Do this by swapping the operands.
(define_split
! [(set (match_operand:SF 0 "fp_register_operand" "")
(if_then_else:SF (lt (match_operand:SF 1 "register_operand" "")
(match_operand:SF 2 "register_operand" ""))
(match_operand:SF 3 "register_operand" "")
(match_operand:SF 4 "register_operand" "")))
(clobber (reg:CC 17))]
! "reload_completed
&& ((operands_match_p (operands[1], operands[3])
&& operands_match_p (operands[2], operands[4]))
|| (operands_match_p (operands[1], operands[4])
***************
*** 16178,16190 ****
;; We can't represent the LT test directly. Do this by swapping the operands.
(define_split
! [(set (match_operand:DF 0 "register_operand" "")
(if_then_else:DF (lt (match_operand:DF 1 "register_operand" "")
(match_operand:DF 2 "register_operand" ""))
(match_operand:DF 3 "register_operand" "")
(match_operand:DF 4 "register_operand" "")))
(clobber (reg:CC 17))]
! "FP_REG_P (operands[0]) && reload_completed
&& ((operands_match_p (operands[1], operands[3])
&& operands_match_p (operands[2], operands[4]))
|| (operands_match_p (operands[1], operands[4])
--- 16174,16186 ----
;; We can't represent the LT test directly. Do this by swapping the operands.
(define_split
! [(set (match_operand:DF 0 "fp_register_operand" "")
(if_then_else:DF (lt (match_operand:DF 1 "register_operand" "")
(match_operand:DF 2 "register_operand" ""))
(match_operand:DF 3 "register_operand" "")
(match_operand:DF 4 "register_operand" "")))
(clobber (reg:CC 17))]
! "reload_completed
&& ((operands_match_p (operands[1], operands[3])
&& operands_match_p (operands[2], operands[4]))
|| (operands_match_p (operands[1], operands[4])
***************
*** 16259,16271 ****
(match_dup 2)))])
(define_split
! [(set (match_operand:SF 0 "register_operand" "")
(if_then_else:SF (gt (match_operand:SF 1 "register_operand" "")
(match_operand:SF 2 "register_operand" ""))
(match_operand:SF 3 "register_operand" "")
(match_operand:SF 4 "register_operand" "")))
(clobber (reg:CC 17))]
! "FP_REG_P (operands[0]) && reload_completed
&& ((operands_match_p (operands[1], operands[3])
&& operands_match_p (operands[2], operands[4]))
|| (operands_match_p (operands[1], operands[4])
--- 16255,16267 ----
(match_dup 2)))])
(define_split
! [(set (match_operand:SF 0 "fp_register_operand" "")
(if_then_else:SF (gt (match_operand:SF 1 "register_operand" "")
(match_operand:SF 2 "register_operand" ""))
(match_operand:SF 3 "register_operand" "")
(match_operand:SF 4 "register_operand" "")))
(clobber (reg:CC 17))]
! "reload_completed
&& ((operands_match_p (operands[1], operands[3])
&& operands_match_p (operands[2], operands[4]))
|| (operands_match_p (operands[1], operands[4])
***************
*** 16340,16352 ****
(match_dup 2)))])
(define_split
! [(set (match_operand:DF 0 "register_operand" "")
(if_then_else:DF (gt (match_operand:DF 1 "register_operand" "")
(match_operand:DF 2 "register_operand" ""))
(match_operand:DF 3 "register_operand" "")
(match_operand:DF 4 "register_operand" "")))
(clobber (reg:CC 17))]
! "FP_REG_P (operands[0]) && reload_completed
&& ((operands_match_p (operands[1], operands[3])
&& operands_match_p (operands[2], operands[4]))
|| (operands_match_p (operands[1], operands[4])
--- 16336,16348 ----
(match_dup 2)))])
(define_split
! [(set (match_operand:DF 0 "fp_register_operand" "")
(if_then_else:DF (gt (match_operand:DF 1 "register_operand" "")
(match_operand:DF 2 "register_operand" ""))
(match_operand:DF 3 "register_operand" "")
(match_operand:DF 4 "register_operand" "")))
(clobber (reg:CC 17))]
! "reload_completed
&& ((operands_match_p (operands[1], operands[3])
&& operands_match_p (operands[2], operands[4]))
|| (operands_match_p (operands[1], operands[4])
Roger
--
Roger Sayle, E-mail: roger@eyesopen.com
OpenEye Scientific Software, WWW: http://www.eyesopen.com/
Suite 1107, 3600 Cerrillos Road, Tel: (+1) 505-473-7385
Santa Fe, New Mexico, 87507. Fax: (+1) 505-473-0833