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v850 improvements


Hi Guys,

  I am applying the attached patch to fix a few bugs in the v850
  backend and to add a separate (tuned) multilib for the v850e.

  The patch was developed a while ago and we now have permission to
  contribute it.

Cheers
        Nick

2001-08-29  Catherine Moore  <clm@redhat.com>

	* config/v850/v850.h (MULDI3_LIBCALL, UCMPDI2_LIBCALL, CMPDI2_LIBCALL,
	NEGDI2_LIBCALL, INIT_TARGET_OPTABS, MASK_STRICT_ALIGN): Define.
	(PREDICATE_CODES): Include new predicates.
	(RTX_COSTS): Handle UMOD and UDIV.  Tune MULT for v850e.
	(TARGET_SWITCHES):  Add strict-align.
	(TARGET_STRICT_ALIGN): New.
	(MASK_DEFAULT, STRICT_ALIGNMENT):  Redefine.	
	* config/v850/t-v850 (MULTILIB_OPTIONS, MULTILIB_DIRNAMES):
	Define.
	(LIB1ASMFUNCS): Add v850_negdi2, v850_cmpdi2, v850_ucmpdi2,
	v850_muldi3.
	* config/v850/lib1funcs.asm (L_callt_save_r2_r29, L_return_r2_r29,
	L_callt_save_r2_r31, L_return_r2_r31,
	L_save_all_interrupt): Change addi to add.
	(L_save_interrupt, L_return_interrupt): Rework.
	(__return_r31):  Correct .size directive.
	(mulsi3, divsi3, udivsi3, umodsi3, modsi3): Tune for v850e.
	(v850_negdi2, v850_cmpdi2, v850_ucmpdi2, v850_muldi3):
	New routines.
	* config/v850/v850.c (expand_prologue): Call
	gen_callt_save_interrupt, gen_callt_restore_all_interrupt,
	gen_callt_return_interrupt and gen_callt_save_all_interrupt.
	(reg_or_int9_operand): New predicate.
	(reg_or_const_operand): New routine.
	* config/v850/v850.md (return_interrupt): Changed from
	restore_interrupt.
	(callt_save_all_interrupt): Changed from save_all_interrupt_v850e.
	(callt_save_interrupt): Change save sequence.
	(callt_return_interrupt): New.
	(save_interrupt): Don't use runtime function for LONG_CALLS
	and TARGET_PROLOG_FUNCTION.
	(save_all_interrupt): Likewise.
	(mulsi3): Use new predicate.
	(moviscc): Disallow some combination of constants.
	Fix define_split for sasf insns, so that it will not generate bad
	code if operand0 and operand5 are the same.
	* config/v850/v850-protos.h: Prototype new predicates.

Index: config/v850/lib1funcs.asm
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/v850/lib1funcs.asm,v
retrieving revision 1.13
diff -c -3 -p -w -r1.13 lib1funcs.asm
*** config/v850/lib1funcs.asm	27 Aug 2002 20:01:16 -0000	1.13
--- config/v850/lib1funcs.asm	29 Aug 2002 08:39:13 -0000
*************** Boston, MA 02111-1307, USA.  */
*** 31,100 ****
  	.text
  	.globl ___mulsi3
  	.type  ___mulsi3,@function
! 
  /*
!  * #define SHIFT 12
!  * #define MASK ((1 << SHIFT) - 1)
!  *  
!  * #define STEP(i, j)                             \
!  * ({                                             \
!  *     short a_part = (a >> (i)) & MASK;          \
!  *     short b_part = (b >> (j)) & MASK;          \
!  *     int res = (((int)a_part) * ((int)b_part)); \
!  *     res;                                       \
!  * })
!  *
!  * int
!  * __mulsi3 (unsigned a, unsigned b)
!  * {
!  *    return STEP (0, 0) +
!  *        ((STEP (SHIFT, 0) + STEP (0, SHIFT)) << SHIFT) +
!  *        ((STEP (0, 2 * SHIFT) + STEP (SHIFT, SHIFT) + STEP (2 * SHIFT, 0))
!  *         << (2 * SHIFT));
!  * }
!  */
  
! ___mulsi3:
!         mov r6,r13
!         movea lo(4095),r0,r16
!         and r16,r13
!         mov r7,r15
!         and r16,r15
!         mov r13,r10
!         mulh r15,r10
!         shr 12,r6
          mov r6,r14
!         and r16,r14
!         mov r14,r11
!         mulh r15,r11
!         shr 12,r7
          mov r7,r12
!         and r16,r12
!         shr 12,r7
!         and r16,r7
!         mulh r13,r7
!         shr 12,r6
!         mulh r12,r13
!         and r16,r6
!         add r13,r11
!         shl 12,r11
!         add r11,r10
          mov r14,r11
          mulh r12,r11
          mulh r15,r6
!         add r11,r7
          add r6,r7
!         shl 24,r7
          add r7,r10
          jmp [r31]
  	.size ___mulsi3,.-___mulsi3
! #endif
  
  #ifdef L_udivsi3
  	.text
  	.global ___udivsi3
  	.type	___udivsi3,@function
  ___udivsi3:
  	mov 1,r12
  	mov 0,r10
  	cmp r6,r7
--- 31,117 ----
  	.text
  	.globl ___mulsi3
  	.type  ___mulsi3,@function
! ___mulsi3:
! #ifdef __v850__	
  /*
!    #define SHIFT 12
!    #define MASK ((1 << SHIFT) - 1)
      
!    #define STEP(i, j)                               \
!    ({                                               \
!        short a_part = (a >> (i)) & MASK;            \
!        short b_part = (b >> (j)) & MASK;            \
!        int res = (((int) a_part) * ((int) b_part)); \
!        res;                                         \
!    })
!   
!    int
!    __mulsi3 (unsigned a, unsigned b)
!    {
!       return STEP (0, 0) +
!           ((STEP (SHIFT, 0) + STEP (0, SHIFT)) << SHIFT) +
!           ((STEP (0, 2 * SHIFT) + STEP (SHIFT, SHIFT) + STEP (2 * SHIFT, 0))
!            << (2 * SHIFT));
!    }
! */
          mov   r6, r14
!         movea lo(32767), r0, r10
!         and   r10, r14
!         mov   r7,  r15
!         and   r10, r15
!         shr   15,  r6
!         mov   r6,  r13
!         and   r10, r13
!         shr   15,  r7
          mov   r7,  r12
!         and   r10, r12
!         shr   15,  r6
!         shr   15,  r7
!         mov   r14, r10
!         mulh  r15, r10
          mov   r14, r11
          mulh  r12, r11
+         mov   r13, r16
+         mulh  r15, r16
+         mulh  r14, r7
          mulh  r15, r6
!         add   r16, r11
!         mulh  r13, r12
!         shl   15,  r11
!         add   r11, r10
!         add   r12, r7
          add   r6,  r7
!         shl   30,  r7
          add   r7,  r10
          jmp   [r31]
+ #endif /* __v850__ */
+ #if defined(__v850e__) || defined(__v850ea__)
+         /* This routine is almost unneccesarry because gcc
+            generates the MUL instruction for the RTX mulsi3.
+            But if someone wants to link his application with
+            previsously compiled v850 objects then they will 
+ 	   need this function.  */
+  
+         /* It isn't good to put the inst sequence as below;
+               mul r7, r6,
+               mov r6, r10, r0
+            In this case, there is a RAW hazard between them.
+            MUL inst takes 2 cycle in EX stage, then MOV inst
+            must wait 1cycle.  */
+         mov   r7, r10
+         mul   r6, r10, r0
+         jmp   [r31]
+ #endif /* __v850e__ */
  	.size ___mulsi3,.-___mulsi3
! #endif /* L_mulsi3 */
! 
  
  #ifdef L_udivsi3
  	.text
  	.global ___udivsi3
  	.type	___udivsi3,@function
  ___udivsi3:
+ #ifdef __v850__
  	mov 1,r12
  	mov 0,r10
  	cmp r6,r7
*************** ___udivsi3:
*** 126,131 ****
--- 143,158 ----
  	bne .L9
  .L8:
  	jmp [r31]
+ 
+ #else /* defined(__v850e__) */
+ 
+ 	/* See comments at end of __mulsi3.  */
+ 	mov   r6, r10	
+ 	divu  r7, r10, r0
+ 	jmp   [r31]		
+ 
+ #endif /* __v850e__ */
+ 
  	.size ___udivsi3,.-___udivsi3
  #endif
  
*************** ___udivsi3:
*** 134,139 ****
--- 161,167 ----
  	.globl ___divsi3
  	.type  ___divsi3,@function
  ___divsi3:
+ #ifdef __v850__
  	add -8,sp
  	st.w r31,4[sp]
  	st.w r22,0[sp]
*************** ___divsi3:
*** 157,162 ****
--- 185,200 ----
  	ld.w 4[sp],r31
  	add 8,sp
  	jmp [r31]
+ 
+ #else /* defined(__v850e__) */
+ 
+ 	/* See comments at end of __mulsi3.  */
+ 	mov   r6, r10
+ 	div   r7, r10, r0
+ 	jmp   [r31]
+ 
+ #endif /* __v850e__ */
+ 
  	.size ___divsi3,.-___divsi3
  #endif
  
*************** ___divsi3:
*** 165,170 ****
--- 203,209 ----
  	.globl ___umodsi3
  	.type  ___umodsi3,@function
  ___umodsi3:
+ #ifdef __v850__
  	add -12,sp
  	st.w r31,8[sp]
  	st.w r7,4[sp]
*************** ___umodsi3:
*** 178,183 ****
--- 217,231 ----
  	ld.w 8[sp],r31
  	add 12,sp
  	jmp [r31]
+ 
+ #else /* defined(__v850e__) */
+ 
+ 	/* See comments at end of __mulsi3.  */
+ 	divu  r7, r6, r10
+ 	jmp   [r31]
+ 
+ #endif /* __v850e__ */
+ 
  	.size ___umodsi3,.-___umodsi3
  #endif /* L_umodsi3 */
  
*************** ___umodsi3:
*** 186,191 ****
--- 234,240 ----
  	.globl ___modsi3
  	.type  ___modsi3,@function
  ___modsi3:
+ #ifdef __v850__	
  	add -12,sp
  	st.w r31,8[sp]
  	st.w r7,4[sp]
*************** ___modsi3:
*** 199,204 ****
--- 248,262 ----
  	ld.w 8[sp],r31
  	add 12,sp
  	jmp [r31]
+ 
+ #else /* defined(__v850e__) */
+ 
+ 	/* See comments at end of __mulsi3.  */
+ 	div  r7, r6, r10
+ 	jmp [r31]
+ 
+ #endif /* __v850e__ */
+ 
  	.size ___modsi3,.-___modsi3
  #endif /* L_modsi3 */
  
*************** __callt_return_r31c:	.short ctoff(.L_cal
*** 1642,1644 ****
--- 1700,1885 ----
  #endif
  
  #endif /* __v850e__ */
+ 
+ /*  libgcc2 routines for NEC V850.  */
+ /*  Double Integer Arithmetical Operation.  */
+ 
+ #ifdef L_negdi2
+ 	.text
+ 	.global ___negdi2
+ 	.type   ___negdi2, @function
+ ___negdi2:
+ 	not	r6, r10
+ 	add	1,  r10
+ 	setf	l,  r6
+ 	not	r7, r11
+ 	add	r6, r11
+ 	jmp	[lp]
+ 
+ 	.size ___negdi2,.-___negdi2
+ #endif
+ 
+ #ifdef L_cmpdi2
+ 	.text
+ 	.global ___cmpdi2
+ 	.type	___cmpdi2,@function
+ ___cmpdi2:
+ 	# Signed comparison bitween each high word.
+ 	cmp	r9, r7
+ 	be	.L_cmpdi_cmp_low
+ 	setf	ge, r10
+ 	setf	gt, r6
+ 	add	r6, r10
+ 	jmp	[lp]
+ .L_cmpdi_cmp_low:
+ 	# Unsigned comparigon bitween each low word.
+ 	cmp     r8, r6
+ 	setf	nl, r10
+ 	setf	h,  r6
+ 	add	r6, r10
+ 	jmp	[lp]	
+ 	.size ___cmpdi2, . - ___cmpdi2	
+ #endif
+ 
+ #ifdef L_ucmpdi2
+ 	.text
+ 	.global ___ucmpdi2
+ 	.type	___ucmpdi2,@function
+ ___ucmpdi2:
+ 	cmp	r9, r7  # Check if each high word are same.
+ 	be	.L_ucmpdi_check_psw
+ 	cmp     r8, r6  # Compare the word.
+ .L_ucmpdi_check_psw:
+ 	setf	nl, r10 # 
+ 	setf	h,  r6  # 
+ 	add	r6, r10 # Add the result of comparison NL and comparison H.
+ 	jmp	[lp]	
+ 	.size ___ucmpdi2, . - ___ucmpdi2
+ #endif
+ 
+ #ifdef L_muldi3
+ 	.text
+ 	.global ___muldi3
+ 	.type	___muldi3,@function
+ ___muldi3:
+ #ifdef __v850__
+         jarl  __save_r26_r31, r10
+         addi  16,  sp, sp
+         mov   r6,  r5
+         shr   15,  r5
+         movea lo(32767), r0, r14
+         and   r14, r5
+         mov   r8,  r10
+         shr   15,  r10
+         and   r14, r10
+         mov   r6,  r19
+         shr   30,  r19
+         mov   r7,  r12
+         shl   2,   r12
+         or    r12, r19
+         and   r14, r19
+         mov   r8,  r13
+         shr   30,  r13
+         mov   r9,  r12
+         shl   2,   r12
+         or    r12, r13
+         and   r14, r13
+         mov   r7,  r11
+         shr   13,  r11
+         and   r14, r11
+         mov   r9,  r31
+         shr   13,  r31
+         and   r14, r31
+         mov   r7,  r29
+         shr   28,  r29
+         and   r14, r29
+         mov   r9,  r12
+         shr   28,  r12
+         and   r14, r12
+         and   r14, r6
+         and   r14, r8
+         mov   r6,  r14
+         mulh  r8,  r14
+         mov   r6,  r16
+         mulh  r10, r16
+         mov   r6,  r18
+         mulh  r13, r18
+         mov   r6,  r15
+         mulh  r31, r15
+         mulh  r12, r6
+         mov   r5,  r17
+         mulh  r10, r17
+         add   -16, sp
+         mov   r5,  r12
+         mulh  r8,  r12
+         add   r17, r18
+         mov   r5,  r17
+         mulh  r31, r17
+         add   r12, r16
+         mov   r5,  r12
+         mulh  r13, r12
+         add   r17, r6
+         mov   r19, r17
+         add   r12, r15
+         mov   r19, r12
+         mulh  r8,  r12
+         mulh  r10, r17
+         add   r12, r18
+         mov   r19, r12
+         mulh  r13, r12
+         add   r17, r15
+         mov   r11, r13
+         mulh  r8,  r13
+         add   r12, r6
+         mov   r11, r12
+         mulh  r10, r12
+         add   r13, r15
+         mulh  r29, r8
+         add   r12, r6
+         mov   r16, r13
+         shl   15,  r13
+         add   r14, r13
+         mov   r18, r12
+         shl   30,  r12
+         mov   r13, r26
+         add   r12, r26
+         shr   15,  r14
+         movhi hi(131071), r0,  r12
+         movea lo(131071), r12, r13
+         and   r13, r14
+         mov   r16, r12
+         and   r13, r12
+         add   r12, r14
+         mov   r18, r12
+         shl   15,  r12
+         and   r13, r12
+         add   r12, r14
+         shr   17,  r14
+         shr   17,  r16
+         add   r14, r16
+         shl   13,  r15
+         shr   2,   r18
+         add   r18, r15
+         add   r15, r16
+         mov   r16, r27
+         add   r8,  r6
+         shl   28,  r6
+         add   r6,  r27
+         mov   r26, r10
+         mov   r27, r11
+         jr    __return_r26_r31
+ #endif /* __v850__ */
+ #if defined(__v850e__) || defined(__v850ea__)
+ 	/*  (Ahi << 32 + Alo) * (Bhi << 32 + Blo) */
+ 	/*   r7           r6      r9         r8   */
+ 	mov  r8, r10
+ 	mulu r7, r8,  r0		/* Ahi * Blo */
+ 	mulu r6, r9,  r0		/* Alo * Bhi */
+ 	mulu r6, r10, r11		/* Alo * Blo */
+ 	add  r8, r11
+ 	add  r9, r11
+ 	jmp  [r31]
+ 
+ #endif /* defined(__v850e__)  || defined(__v850ea__) */
+ 	.size ___muldi3, . - ___muldi3
+ #endif
Index: config/v850/t-v850
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/v850/t-v850,v
retrieving revision 1.9
diff -c -3 -p -w -r1.9 t-v850
*** config/v850/t-v850	27 Aug 2002 20:01:16 -0000	1.9
--- config/v850/t-v850	29 Aug 2002 08:39:13 -0000
*************** LIB1ASMFUNCS	= _mulsi3 \
*** 56,62 ****
  		  _callt_save_all_interrupt \
  		  _callt_save_r2_r29 \
  		  _callt_save_r2_r31 \
! 		  _callt_save_r6_r9
  
  # We want fine grained libraries, so use the new code to build the
  # floating point emulation libraries.
--- 56,66 ----
  		  _callt_save_all_interrupt \
  		  _callt_save_r2_r29 \
  		  _callt_save_r2_r31 \
! 		  _callt_save_r6_r9 \
! 		  _negdi2 \
! 		  _cmpdi2 \
! 		  _ucmpdi2 \
! 		  _muldi3
  
  # We want fine grained libraries, so use the new code to build the
  # floating point emulation libraries.
*************** fp-bit.c: $(srcdir)/config/fp-bit.c
*** 76,84 ****
  	echo '#endif' 		>> fp-bit.c
  	cat $(srcdir)/config/fp-bit.c >> fp-bit.c
  
! TCFLAGS = -Wa,-mwarn-signed-overflow -Wa,-mwarn-unsigned-overflow
! # Create non-target specific versions of the libraries
! TCFLAGS += -mno-app-regs -msmall-sld -mv850 -D__v850e__ -Wa,-mv850any
  
  v850-c.o: $(srcdir)/config/v850/v850-c.c $(RTL_H) $(TREE_H) $(CONFIG_H)
  	$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<
--- 80,91 ----
  	echo '#endif' 		>> fp-bit.c
  	cat $(srcdir)/config/fp-bit.c >> fp-bit.c
  
! # Create target-specific versions of the libraries
! MULTILIB_OPTIONS  = mv850/mv850e
! MULTILIB_DIRNAMES = v850 v850e
! INSTALL_LIBGCC    = install-multilib
! 
! TCFLAGS = -mno-app-regs -msmall-sld -Wa,-mwarn-signed-overflow -Wa,-mwarn-unsigned-overflow
  
  v850-c.o: $(srcdir)/config/v850/v850-c.c $(RTL_H) $(TREE_H) $(CONFIG_H)
  	$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<
Index: config/v850/v850-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/v850/v850-protos.h,v
retrieving revision 1.13
diff -c -3 -p -w -r1.13 v850-protos.h
*** config/v850/v850-protos.h	27 Aug 2002 20:01:16 -0000	1.13
--- config/v850/v850-protos.h	29 Aug 2002 08:39:13 -0000
***************
*** 1,5 ****
  /* Prototypes for v850.c functions used in the md file & elsewhere.
!    Copyright (C) 1999, 2000 Free Software Foundation, Inc.
  
  This file is part of GNU CC.
  
--- 1,5 ----
  /* Prototypes for v850.c functions used in the md file & elsewhere.
!    Copyright (C) 1999, 2000, 2002 Free Software Foundation, Inc.
  
     This file is part of GNU CC.
  
*************** extern void   notice_update_cc          
*** 53,58 ****
--- 53,60 ----
  extern char * construct_save_jarl           PARAMS ((rtx));
  extern char * construct_restore_jr          PARAMS ((rtx));
  #ifdef HAVE_MACHINE_MODES
+ extern int    reg_or_int9_operand           PARAMS ((rtx, Mmode));
+ extern int    reg_or_const_operand          PARAMS ((rtx, Mmode));
  extern char * construct_dispose_instruction PARAMS ((rtx));
  extern char * construct_prepare_instruction PARAMS ((rtx));
  extern int    pattern_is_ok_for_prepare     PARAMS ((rtx, Mmode));
Index: config/v850/v850.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/v850/v850.c,v
retrieving revision 1.63
diff -c -3 -p -w -r1.63 v850.c
*** config/v850/v850.c	27 Aug 2002 20:01:16 -0000	1.63
--- config/v850/v850.c	29 Aug 2002 08:39:14 -0000
***************
*** 5,24 ****
  
  This file is part of GNU CC.
  
! GNU CC is free software; you can redistribute it and/or modify
! it under the terms of the GNU General Public License as published by
  the Free Software Foundation; either version 2, or (at your option)
  any later version.
  
! GNU CC is distributed in the hope that it will be useful,
! but WITHOUT ANY WARRANTY; without even the implied warranty of
! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
! GNU General Public License for more details.
  
  You should have received a copy of the GNU General Public License
! along with GNU CC; see the file COPYING.  If not, write to
! the Free Software Foundation, 59 Temple Place - Suite 330,
! Boston, MA 02111-1307, USA.  */
  
  #include "config.h"
  #include "system.h"
--- 5,24 ----
  
     This file is part of GNU CC.
  
!    GNU CC is free software; you can redistribute it and/or modify it
!    under the terms of the GNU General Public License as published by
     the Free Software Foundation; either version 2, or (at your option)
     any later version.
  
!    GNU CC is distributed in the hope that it will be useful, but WITHOUT
!    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
!    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
!    for more details.
  
     You should have received a copy of the GNU General Public License
!    along with GNU CC; see the file COPYING.  If not, write to the Free
!    Software Foundation, 59 Temple Place - Suite 330, Boston, MA
!    02111-1307, USA.  */
  
  #include "config.h"
  #include "system.h"
Index: config/v850/v850.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/v850/v850.h,v
retrieving revision 1.71
diff -c -3 -p -w -r1.71 v850.h
*** config/v850/v850.h	27 Aug 2002 20:01:16 -0000	1.71
--- config/v850/v850.h	29 Aug 2002 08:39:14 -0000
*************** extern int target_flags;
*** 86,91 ****
--- 86,92 ----
  #define MASK_BIG_SWITCH		0x00000100
  #define MASK_NO_APP_REGS        0x00000200
  #define MASK_DISABLE_CALLT      0x00000400
+ #define MASK_STRICT_ALIGN       0x00000800
  
  #define MASK_US_BIT_SET         0x00001000
  #define MASK_US_MASK_SET        0x00002000
*************** extern int target_flags;
*** 145,150 ****
--- 146,153 ----
     and r5 are to be fixed registers (for compatibility with GHS).  */
  #define TARGET_NO_APP_REGS  	(target_flags & MASK_NO_APP_REGS)
  
+ #define TARGET_STRICT_ALIGN 	(target_flags & MASK_STRICT_ALIGN)
+ 
  /* Macro to define tables used to set the flags.
     This is a list in braces of pairs in braces,
     each pair being { "NAME", VALUE }
*************** extern int target_flags;
*** 182,187 ****
--- 185,193 ----
     { "app-regs",                -MASK_NO_APP_REGS, ""  },               \
     { "no-app-regs",              MASK_NO_APP_REGS, 			\
         				N_("Do not use registers r2 and r5") }, \
+    { "strict-align",             MASK_STRICT_ALIGN,			\
+ 				N_("Enfore strict alignment") },        \
+    { "no-strict-align",         -MASK_STRICT_ALIGN, "" },		\
     { "big-switch",		 MASK_BIG_SWITCH, 			\
         				N_("Use 4 byte entries in switch tables") },\
     { "",			 MASK_DEFAULT, ""}}
*************** extern struct small_memory_info small_me
*** 255,260 ****
--- 261,267 ----
  
  #define OPTIMIZATION_OPTIONS(LEVEL,SIZE)				\
  {									\
+   target_flags |= MASK_STRICT_ALIGN;					\
    if (LEVEL)								\
      target_flags |= (MASK_EP | MASK_PROLOG_FUNCTION);			\
  }
*************** extern struct small_memory_info small_me
*** 314,320 ****
  
  /* Define this if move instructions will actually fail to work
     when given unaligned data.  */
! #define STRICT_ALIGNMENT 1
  
  /* Define this as 1 if `char' should by default be signed; else as 0.
  
--- 321,327 ----
  
  /* Define this if move instructions will actually fail to work
     when given unaligned data.  */
! #define STRICT_ALIGNMENT  TARGET_STRICT_ALIGN
  
  /* Define this as 1 if `char' should by default be signed; else as 0.
  
*************** do {									\
*** 1048,1055 ****
--- 1055,1081 ----
  #define RTX_COSTS(RTX,CODE,OUTER_CODE)					\
    case MOD:								\
    case DIV:								\
+   case UMOD:								\
+   case UDIV:								\
+     if (TARGET_V850E && optimize_size)					\
+       return 6;								\
      return 60;								\
    case MULT:								\
+     if (TARGET_V850E							\
+ 	&& (   GET_MODE (RTX) == SImode					\
+ 	    || GET_MODE (RTX) == HImode					\
+ 	    || GET_MODE (RTX) == QImode))				\
+       {									\
+ 	if (GET_CODE (XEXP (RTX, 1)) == REG)				\
+ 	  return 4;							\
+ 	else if (GET_CODE (XEXP (RTX, 1)) == CONST_INT)			\
+ 	  {								\
+ 	    if (CONST_OK_FOR_O (INTVAL (XEXP (RTX, 1))))		\
+ 	      return 6;							\
+ 	    else if (CONST_OK_FOR_K (INTVAL (XEXP (RTX, 1))))		\
+ 	      return 10;						\
+ 	  }								\
+       }									\
      return 20;
  
  /* All addressing modes have the same cost on the V850 series.  */
*************** zbss_section ()								\
*** 1360,1365 ****
--- 1386,1408 ----
  
  #define STORE_FLAG_VALUE 1
  
+ #define MULDI3_LIBCALL  "__muldi3"
+ #define UCMPDI2_LIBCALL "__ucmpdi2"
+ #define CMPDI2_LIBCALL  "__cmpdi2"
+ #define NEGDI2_LIBCALL  "__negdi2"
+ 
+ #define INIT_TARGET_OPTABS 				\
+   do							\
+     { 							\
+       cmp_optab->handlers[(int) DImode].libfunc		\
+ 	= init_one_libfunc (CMPDI2_LIBCALL);            \
+       ucmp_optab->handlers[(int) DImode].libfunc        \
+ 	= init_one_libfunc (UCMPDI2_LIBCALL);           \
+       neg_optab->handlers[(int) DImode].libfunc		\
+ 	= init_one_libfunc (NEGDI2_LIBCALL);		\
+     }							\
+   while (0)
+ 
  /* Specify the machine mode that pointers have.
     After generation of rtl, the compiler makes no further distinction
     between pointers and any other objects of this machine mode.  */
*************** extern union tree_node * GHS_current_sec
*** 1470,1475 ****
--- 1513,1520 ----
  #define PREDICATE_CODES							\
  { "reg_or_0_operand",		{ REG, SUBREG, CONST_INT, CONST_DOUBLE }}, \
  { "reg_or_int5_operand",	{ REG, SUBREG, CONST_INT }},		\
+ { "reg_or_int9_operand",	{ REG, SUBREG, CONST_INT }},		\
+ { "reg_or_const_operand",       { REG, CONST_INT }},			\
  { "call_address_operand",	{ REG, SYMBOL_REF }},			\
  { "movsi_source_operand",	{ LABEL_REF, SYMBOL_REF, CONST_INT,	\
  				  CONST_DOUBLE, CONST, HIGH, MEM,	\
Index: config/v850/v850.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/v850/v850.md,v
retrieving revision 1.18
diff -c -3 -p -w -r1.18 v850.md
*** config/v850/v850.md	27 Aug 2002 20:01:16 -0000	1.18
--- config/v850/v850.md	29 Aug 2002 08:39:14 -0000
***************
*** 409,415 ****
  (define_insn "mulsi3"
    [(set (match_operand:SI 0 "register_operand" "=r")
  	(mult:SI (match_operand:SI 1 "register_operand" "%0")
- 		 ;; %redact changeone /reg_or_int9/ 'register' unless nec-no-copyright
  		 (match_operand:SI 2 "reg_or_int9_operand" "rO")))]
    "TARGET_V850E"
    "mul %2,%1,%."
--- 409,414 ----
***************
*** 860,868 ****
  	(if_then_else:SI
  	 (match_operator 1 "comparison_operator"
  			 [(match_dup 4) (match_dup 5)])
-          ;; %redact changeone /const/ 'int5' unless nec-no-copyright
  	 (match_operand:SI 2 "reg_or_const_operand" "rJ")
-          ;; %redact changeone /const/ '0' unless nec-no-copyright
  	 (match_operand:SI 3 "reg_or_const_operand" "rI")))]
    "TARGET_V850E"
    "
--- 859,865 ----

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