This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Old PPC patch - 405F, 440 support
- From: Zack Weinberg <zack at codesourcery dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Geoff Keating <geoffk at geoffk dot org>
- Date: Wed, 28 Aug 2002 22:03:32 -0700
- Subject: Old PPC patch - 405F, 440 support
This is an old patch which has come to me; I didn't write it, nor do I
know whether it is desirable or even correct and complete; I'm pretty
sure that the scheduling descriptions at least are incomplete. It
makes the rs6000/powerpc back end aware of the PPC405F and 440 chips.
I've built cc1 for an i686-linux -> powerpc-eabisim cross compiler
with this patch applied. At this time I am looking for comments, not
approval - anything from "it's not necessary to recognize these as
separate CPUs" to "you need to patch here, here, and here too" would
be helpful.
zw
* config/rs6000/rs6000.c (struct processor_target_table):
Add entries for 405f and 440 chips.
* config/rs6000/rs6000.h (ASM_CPU_SPEC, enum processor_type,
RTX_COSTS): Likewise.
* config/rs6000/rs6000.md (scheduling descriptions): Likewise.
* config/rs6000/t-newas (MULTILIB_MATCHES): Likewise.
===================================================================
Index: config/rs6000/rs6000.c
--- config/rs6000/rs6000.c 23 Aug 2002 18:02:22 -0000 1.368
+++ config/rs6000/rs6000.c 29 Aug 2002 04:57:57 -0000
@@ -435,9 +435,15 @@ rs6000_override_options (default_cpu)
{"403", PROCESSOR_PPC403,
MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN,
POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
- {"405", PROCESSOR_PPC405,
- MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
- POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
+ {"405", PROCESSOR_PPC405,
+ MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
+ POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
+ {"405f", PROCESSOR_PPC405,
+ MASK_POWERPC | MASK_NEW_MNEMONICS,
+ POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
+ {"440", PROCESSOR_PPC403,
+ MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
+ POWER_MASKS | POWERPC_OPT_MASKS},
{"505", PROCESSOR_MPCCORE,
MASK_POWERPC | MASK_NEW_MNEMONICS,
POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
===================================================================
Index: config/rs6000/rs6000.h
--- config/rs6000/rs6000.h 27 Aug 2002 14:55:42 -0000 1.225
+++ config/rs6000/rs6000.h 29 Aug 2002 04:57:58 -0000
@@ -69,6 +69,8 @@ Boston, MA 02111-1307, USA. */
%{mcpu=401: -mppc} \
%{mcpu=403: -m403} \
%{mcpu=405: -m405} \
+%{mcpu=405f: -mppc} \
+%{mcpu=440: -mppc} \
%{mcpu=505: -mppc} \
%{mcpu=601: -m601} \
%{mcpu=602: -mppc} \
@@ -350,6 +352,8 @@ enum processor_type
PROCESSOR_MPCCORE,
PROCESSOR_PPC403,
PROCESSOR_PPC405,
+ PROCESSOR_PPC405F,
+ PROCESSOR_PPC440,
PROCESSOR_PPC601,
PROCESSOR_PPC603,
PROCESSOR_PPC604,
@@ -2346,6 +2350,8 @@ do { \
{ \
case PROCESSOR_RIOS1: \
case PROCESSOR_PPC405: \
+ case PROCESSOR_PPC405F: \
+ case PROCESSOR_PPC440: \
return (GET_CODE (XEXP (X, 1)) != CONST_INT \
? COSTS_N_INSNS (5) \
: INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
@@ -2409,6 +2415,8 @@ do { \
case PROCESSOR_PPC403: \
return COSTS_N_INSNS (33); \
case PROCESSOR_PPC405: \
+ case PROCESSOR_PPC405F: \
+ case PROCESSOR_PPC440: \
return COSTS_N_INSNS (35); \
case PROCESSOR_PPC601: \
return COSTS_N_INSNS (36); \
===================================================================
Index: config/rs6000/rs6000.md
--- config/rs6000/rs6000.md 19 Aug 2002 16:32:54 -0000 1.204
+++ config/rs6000/rs6000.md 29 Aug 2002 04:58:00 -0000
@@ -56,7 +56,7 @@
;; Processor type -- this attribute must exactly match the processor_type
;; enumeration in rs6000.h.
-(define_attr "cpu" "rios1,rios2,rs64a,mpccore,ppc403,ppc405,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,power4"
+(define_attr "cpu" "rios1,rios2,rs64a,mpccore,ppc403,ppc405,ppc405f,ppc440,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,power4"
(const (symbol_ref "rs6000_cpu_attr")))
; (define_function_unit NAME MULTIPLICITY SIMULTANEITY
@@ -111,7 +111,7 @@
(define_function_unit "iu" 1 0
(and (eq_attr "type" "load")
- (eq_attr "cpu" "rios1,ppc403,ppc405,ppc601"))
+ (eq_attr "cpu" "rios1,ppc403,ppc405,ppc405f,ppc440,ppc601"))
2 1)
(define_function_unit "iu" 1 0
@@ -157,7 +157,7 @@
(define_function_unit "iu" 1 0
(and (eq_attr "type" "imul,imul2,imul3")
- (eq_attr "cpu" "ppc403"))
+ (eq_attr "cpu" "ppc403,ppc405,ppc405f,ppc440"))
4 4)
(define_function_unit "iu" 1 0
@@ -227,7 +227,7 @@
(define_function_unit "iu" 1 0
(and (eq_attr "type" "idiv")
- (eq_attr "cpu" "ppc403"))
+ (eq_attr "cpu" "ppc403,ppc405,ppc405f,ppc440"))
33 33)
(define_function_unit "iu" 1 0
@@ -499,7 +499,7 @@
(define_function_unit "iu" 1 0
(and (eq_attr "type" "compare,delayed_compare")
- (eq_attr "cpu" "rs64a,mpccore,ppc403,ppc405,ppc601,ppc603"))
+ (eq_attr "cpu" "rs64a,mpccore,ppc403,ppc405,ppc405f,ppc440,ppc601,ppc603"))
3 1)
; some extra cycles added by TARGET_SCHED_ADJUST_COST between compare
@@ -563,7 +563,7 @@
(define_function_unit "bpu" 1 0
(and (eq_attr "type" "mtjmpr")
- (eq_attr "cpu" "mpccore,ppc403,ppc405,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630"))
+ (eq_attr "cpu" "mpccore,ppc403,ppc405,ppc405f,ppc440,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750"))
4 1)
(define_function_unit "sru" 1 0
===================================================================
Index: config/rs6000/t-newas
--- config/rs6000/t-newas 17 May 2001 03:16:11 -0000 1.5
+++ config/rs6000/t-newas 29 Aug 2002 04:58:00 -0000
@@ -20,6 +20,8 @@ MULTILIB_DIRNAMES = soft-float \
common power powerpc
MULTILIB_MATCHES = msoft-float=mcpu?403 \
+ msoft-float=mcpu?405 \
+ msoft-float=mcpu?440 \
mcpu?power=mpower \
mcpu?power=mrios1 \
mcpu?power=mcpu?rios1 \
@@ -35,6 +37,8 @@ MULTILIB_MATCHES = msoft-float=mcpu?403
mcpu?powerpc=mcpu?604 \
mcpu?powerpc=mcpu?620 \
mcpu?powerpc=mcpu?403 \
+ mcpu?powerpc=mcpu?405 \
+ mcpu?powerpc=mcpu?440 \
mcpu?powerpc=mpowerpc \
mcpu?powerpc=mpowerpc-gpopt \
mcpu?powerpc=mpowerpc-gfxopt