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mips16 EH fix.
- From: Richard Sandiford <rsandifo at redhat dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: 30 Jul 2002 21:45:27 +0100
- Subject: mips16 EH fix.
When building a mips16 o64 multilib, you get an ICE in unwind-dw2.c.
The constraints on eh_set_lr_si and eh_set_lr_di allow call-used
"normal-mode" registers, while the define_split only works for mips16
registers.
Patch below fixes the ICE. Also tested on mips-elf in conjunction
with the abi64.h patch, no regressions.
I checked for other 'r' constraints in mips.md. There are some
(not many) but they only seem to be used in normal-mode patterns.
Maybe they should use 'd' anyway, for consistency.
Richard
* config/mips/mips.md (eh_set_lr_si, eh_set_lr_di): Change
constraints to 'd'.
Index: config/mips/mips.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.md,v
retrieving revision 1.137
diff -c -d -p -r1.137 mips.md
*** config/mips/mips.md 25 Jul 2002 09:58:19 -0000 1.137
--- config/mips/mips.md 30 Jul 2002 20:10:16 -0000
*************** ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n
*** 9866,9879 ****
;; until we know where it will be put in the stack frame.
(define_insn "eh_set_lr_si"
! [(unspec [(match_operand:SI 0 "register_operand" "r")] UNSPEC_EH_RETURN)
! (clobber (match_scratch:SI 1 "=&r"))]
"! TARGET_64BIT"
"#")
(define_insn "eh_set_lr_di"
! [(unspec [(match_operand:DI 0 "register_operand" "r")] UNSPEC_EH_RETURN)
! (clobber (match_scratch:DI 1 "=&r"))]
"TARGET_64BIT"
"#")
--- 9866,9879 ----
;; until we know where it will be put in the stack frame.
(define_insn "eh_set_lr_si"
! [(unspec [(match_operand:SI 0 "register_operand" "d")] UNSPEC_EH_RETURN)
! (clobber (match_scratch:SI 1 "=&d"))]
"! TARGET_64BIT"
"#")
(define_insn "eh_set_lr_di"
! [(unspec [(match_operand:DI 0 "register_operand" "d")] UNSPEC_EH_RETURN)
! (clobber (match_scratch:DI 1 "=&d"))]
"TARGET_64BIT"
"#")