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[PATCH]: Fix addsi/subsi3 patterns for HC12 (auto-inc modes pb)

Hi!

The following patch fixes the HC11/HC12 patterns to avoid auto increment/decrement
modes on add/sub instructions.  The 32-bit split is not compatible with these
auto inc/dec modes.  I've committed on mainline and 3_1 branch.

	Stephane

2002-06-28  Stephane Carrez  <stcarrez@nerim.fr>

	* config/m68hc11/m68hc11.md ("*addsi3"): Use 'o' constraint to
	avoid the auto increment addressing modes.
	("*subsi3"): Likewise.
	(split for add/sub on address): For 68HC12 push the value on
	the stack and do the operation with a pop.


Index: config/m68hc11/m68hc11.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m68hc11/m68hc11.md,v
retrieving revision 1.31
diff -u -p -r1.31 m68hc11.md
--- config/m68hc11/m68hc11.md	24 Mar 2002 16:02:57 -0000	1.31
+++ config/m68hc11/m68hc11.md	28 Jun 2002 21:14:33 -0000
@@ -1,6 +1,6 @@
 ;;- Machine description file for Motorola 68HC11 and 68HC12.
 ;;- Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
-;;- Contributed by Stephane Carrez (stcarrez@worldnet.fr)
+;;- Contributed by Stephane Carrez (stcarrez@nerim.fr)
 
 ;; This file is part of GNU CC.
 
@@ -1900,9 +1900,9 @@
 }")
 
 (define_insn "*addsi3"
-  [(set (match_operand:SI 0 "non_push_operand" "=m,D,!u,?D,D")
+  [(set (match_operand:SI 0 "non_push_operand" "=o,D,!u,?D,D")
 	(plus:SI (match_operand:SI 1 "non_push_operand" "%0,0,0,0,0")
-		 (match_operand:SI 2 "general_operand" "ML,i,ML,?D,?miu")))
+		 (match_operand:SI 2 "general_operand" "ML,i,ML,?D,?oiu")))
    (clobber (match_scratch:HI 3 "=d,X,d,X,X"))]
   ""
   "*
@@ -2500,8 +2500,8 @@
 
 (define_insn "*subsi3"
   [(set (match_operand:SI 0 "register_operand" "=D,D,D,D,!u")
-	(minus:SI (match_operand:SI 1 "general_operand" "0,mi,0,!u,0")
-		  (match_operand:SI 2 "general_operand" "mi,D,!u,D,!mui")))
+	(minus:SI (match_operand:SI 1 "general_operand" "0,oi,0,!u,0")
+		  (match_operand:SI 2 "general_operand" "oi,D,!u,D,!oui")))
    (clobber (match_scratch:HI 3 "=X,X,X,X,d"))]
   ""
   "#")
@@ -3932,19 +3932,55 @@
             || (GET_CODE (operands[2]) == CONST_INT
 	        && INTVAL (operands[2]) >= -4
 	        && INTVAL (operands[2]) <= 4)))"
-  [(set (match_dup 4) (match_dup 5))
+  [(set (match_dup 9) (match_dup 0))
+   (set (match_dup 4) (match_dup 5))
    (set (match_dup 8) (match_dup 7))
+   (set (match_dup 0) (match_dup 1))
    (parallel [(set (reg:HI D_REGNUM) (match_dup 0))
               (set (match_dup 0) (reg:HI D_REGNUM))])
    (set (reg:HI D_REGNUM) (match_op_dup 3 [(reg:HI D_REGNUM) (match_dup 6)]))
    (parallel [(set (reg:HI D_REGNUM) (match_dup 0))
               (set (match_dup 0) (reg:HI D_REGNUM))])]
   "
+   operands[9] = operands[0];
+   /* For 68HC12, push the value on the stack and do the operation
+      with a pop.  */
+   if (TARGET_M6812
+       && m68hc11_non_shift_operator (operands[3], HImode)
+       && (H_REG_P (operands[2])
+	   || (m68hc11_small_indexed_indirect_p (operands[2], HImode)
+	       && reg_mentioned_p (operands[0], operands[2]))))
+     {
+       operands[4] = gen_rtx (MEM, HImode,
+			      gen_rtx (PRE_DEC, HImode,
+				       gen_rtx (REG, HImode, HARD_SP_REGNUM)));
+       operands[6] = gen_rtx (MEM, HImode,
+			      gen_rtx (POST_INC, HImode,
+				       gen_rtx (REG, HImode, HARD_SP_REGNUM)));
+       operands[5] = operands[2];
+       operands[8] = operands[7] = operands[0];
+     }
    /* Save the operand2 in a temporary location and use it.  */
-   if ((H_REG_P (operands[2])
-        || reg_mentioned_p  (operands[0], operands[2]))
-       && !(SP_REG_P (operands[2]) && GET_CODE (operands[3]) == PLUS))
+   else if ((H_REG_P (operands[2])
+             || reg_mentioned_p  (operands[0], operands[2]))
+            && !(SP_REG_P (operands[2]) && GET_CODE (operands[3]) == PLUS))
      {
+       if (GET_CODE (operands[3]) == MINUS
+	   && reg_mentioned_p (operands[0], operands[2]))
+	 {
+	   operands[9] = gen_rtx (MEM, HImode,
+			      gen_rtx (PRE_DEC, HImode,
+				       gen_rtx (REG, HImode, HARD_SP_REGNUM)));
+	   operands[1] = gen_rtx (MEM, HImode,
+			      gen_rtx (POST_INC, HImode,
+				       gen_rtx (REG, HImode, HARD_SP_REGNUM)));
+	   operands[8] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
+	   operands[4] = operands[7] = operands[0];
+	   operands[6] = operands[8];
+	   operands[5] = operands[2];
+	 }
+       else 
+	 {
        operands[4] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
        operands[6] = operands[4];
        if (!H_REG_P (operands[2]))
@@ -3957,6 +3993,7 @@
 	 {
            operands[5] = operands[2];
 	   operands[8] = operands[7] = operands[0];
+	 }
 	 }
      }
    else
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