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extract/store_bit_field fix
- From: Aldy Hernandez <aldyh at redhat dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Tue, 30 Apr 2002 18:30:33 +1000
- Subject: extract/store_bit_field fix
hi guys.
The following small test dies with an ICE here:
expmed.c:
if (GET_MODE (SUBREG_REG (op0)) == mode1
|| GET_MODE_CLASS (mode1) == MODE_INT
|| GET_MODE_CLASS (mode1) == MODE_PARTIAL_INT)
op0 = SUBREG_REG (op0);
else
/* Else we've got some float mode source being extracted into
a different float mode destination -- this combination of
subregs results in Severe Tire Damage. */
--> abort ();
...because extract bit field knows nothing about MODE_VECTOR_INT.
is this patch ok for 3.1 and trunk?
2002-04-30 Aldy Hernandez <aldyh@redhat.com>
* expmed.c (store_bit_field): Handle vector.
(extract_bit_field): Same.
* gcc.dg/altivec-6.c: New.
Index: expmed.c
===================================================================
RCS file: /cvs/uberbaum/gcc/expmed.c,v
retrieving revision 1.117
diff -c -p -r1.117 expmed.c
*** expmed.c 26 Apr 2002 02:09:21 -0000 1.117
--- expmed.c 30 Apr 2002 08:22:46 -0000
*************** store_bit_field (str_rtx, bitsize, bitnu
*** 357,362 ****
--- 357,363 ----
if (GET_CODE (op0) == SUBREG)
{
if (GET_MODE (SUBREG_REG (op0)) == fieldmode
+ || GET_MODE_CLASS (mode1) == MODE_VECTOR_INT
|| GET_MODE_CLASS (fieldmode) == MODE_INT
|| GET_MODE_CLASS (fieldmode) == MODE_PARTIAL_INT)
op0 = SUBREG_REG (op0);
*************** store_bit_field (str_rtx, bitsize, bitnu
*** 434,439 ****
--- 435,441 ----
if (GET_CODE (op0) == SUBREG)
{
if (GET_MODE (SUBREG_REG (op0)) == fieldmode
+ || GET_MODE_CLASS (fieldmode) == MODE_VECTOR_INT
|| GET_MODE_CLASS (fieldmode) == MODE_INT
|| GET_MODE_CLASS (fieldmode) == MODE_PARTIAL_INT)
op0 = SUBREG_REG (op0);
*************** extract_bit_field (str_rtx, bitsize, bit
*** 1137,1142 ****
--- 1139,1145 ----
if (GET_CODE (op0) == SUBREG)
{
if (GET_MODE (SUBREG_REG (op0)) == mode1
+ || GET_MODE_CLASS (mode1) == MODE_VECTOR_INT
|| GET_MODE_CLASS (mode1) == MODE_INT
|| GET_MODE_CLASS (mode1) == MODE_PARTIAL_INT)
op0 = SUBREG_REG (op0);
Index: testsuite/gcc.dg/altivec-6.c
===================================================================
RCS file: testsuite/gcc.dg/altivec-6.c
diff -N testsuite/gcc.dg/altivec-6.c
*** /dev/null 1 Jan 1970 00:00:00 -0000
--- testsuite/gcc.dg/altivec-6.c 30 Apr 2002 08:22:46 -0000
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do compile { target powerpc-*-* } } */
+ /* { dg-options "-maltivec -O1" } */
+
+ #include <altivec.h>
+
+ vector signed short b16;
+ vector signed short poop;
+
+ int
+ main ()
+ {
+ vector signed short hannah = poop;
+
+ b16 = vec_xor (b16, *(&hannah));
+ return 0;
+ }