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Re: [PATCH] Additional builtin memset optimization
On Sun, Apr 21, 2002 at 07:22:27PM -0600, Roger Sayle wrote:
>
> There is no restriction to 32-bit words in the patch itself, I only
> described the sequence up to 32-bit words for brevity of exposition.
> The decisions on which sequences of stores to use is still in GCC's
> can_store_by_pieces, so on platforms where 64-bit or 128-bit moves
> are optimal and the alignment is sufficient, they'll be used. For
> ia32 however, I doubt it'll use anything larger than a 32-bit stores.
Okay, cool then. Looks like a nice improvement.
> However, one possible room for improvement is to teach the integer
> multiplication code about subregs. For example, teaching it to use
> the "mov ah, al" instruction for multiplications by 0x0101 on x86.
I don't think this is a win on a modern chip, you'll just get a
partial register stall.
zw