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[patch] Remove SLOW_ZERO_EXTEND. (committed)
- From: Kazu Hirata <kazu at hxi dot com>
- To: gcc-patches at gcc dot gnu dot org
- Subject: [patch] Remove SLOW_ZERO_EXTEND. (committed)
Hi,
With Richard's recent approval and accoding to Joseph's suggestion,
this is the patch I actually committed.
Kazu Hirata
2002-01-15 Kazu Hirata <kazu@hxi.com>
* expmed.c (extract_fixed_bit_field): Remove unused code.
* system.h: Poison SLOW_ZERO_EXTEND.
* doc/tm.texi: Remove.
* config/1750a/1750a.h (SLOW_ZERO_EXTEND): Remove.
* config/arm/arm.h: Likewise.
* config/avr/avr.h: Likewise.
* config/clipper/clipper.h: Likewise.
* config/convex/convex.h: Likewise.
* config/d30v/d30v.h: Likewise.
* config/dsp16xx/dsp16xx.h: Likewise.
* config/elxsi/elxsi.h: Likewise.
* config/fr30/fr30.h: Likewise.
* config/h8300/h8300.h: Likewise.
* config/i370/i370.h: Likewise.
* config/i386/i386.h: Likewise.
* config/m68k/m68k.h: Likewise.
* config/mips/mips.h: Likewise.
* config/ns32k/ns32k.h: Likewise.
* config/pdp11/pdp11.h: Likewise.
* config/pj/pj.h: Likewise.
* config/s390/s390.h: Likewise.
* config/sh/sh.h: Likewise.
* config/stormy16/stormy16.h: Likewise.
* config/v850/v850.h: Likewise.
* config/vax/vax.h: Likewise.
* config/we32k/we32k.h: Likewise.
Index: expmed.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/expmed.c,v
retrieving revision 1.101
diff -u -r1.101 expmed.c
--- expmed.c 2002/01/05 22:11:20 1.101
+++ expmed.c 2002/01/16 02:30:20
@@ -1621,16 +1621,7 @@
/* Unless the msb of the field used to be the msb when we shifted,
mask out the upper bits. */
- if (GET_MODE_BITSIZE (mode) != bitpos + bitsize
-#if 0
-#ifdef SLOW_ZERO_EXTEND
- /* Always generate an `and' if
- we just zero-extended op0 and SLOW_ZERO_EXTEND, since it
- will combine fruitfully with the zero-extend. */
- || tmode != mode
-#endif
-#endif
- )
+ if (GET_MODE_BITSIZE (mode) != bitpos + bitsize)
return expand_binop (GET_MODE (op0), and_optab, op0,
mask_rtx (GET_MODE (op0), 0, bitsize, 0),
target, 1, OPTAB_LIB_WIDEN);
Index: system.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/system.h,v
retrieving revision 1.114
diff -u -r1.114 system.h
--- system.h 2002/01/15 20:20:18 1.114
+++ system.h 2002/01/16 02:30:20
@@ -604,7 +604,8 @@
DOESNT_NEED_UNWINDER EH_TABLE_LOOKUP OBJC_SELECTORS_WITHOUT_LABELS \
OMIT_EH_TABLE EASY_DIV_EXPR IMPLICIT_FIX_EXPR \
LONGJMP_RESTORE_FROM_STACK MAX_INT_TYPE_SIZE ASM_IDENTIFY_GCC \
- STDC_VALUE TRAMPOLINE_ALIGN ASM_IDENTIFY_GCC_AFTER_SOURCE
+ STDC_VALUE TRAMPOLINE_ALIGN ASM_IDENTIFY_GCC_AFTER_SOURCE \
+ SLOW_ZERO_EXTEND
#endif /* IN_GCC */
Index: doc/tm.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/tm.texi,v
retrieving revision 1.88
diff -u -r1.88 tm.texi
--- tm.texi 2002/01/08 22:51:19 1.88
+++ tm.texi 2002/01/16 02:30:23
@@ -5176,22 +5176,6 @@
may eliminate subsequent memory access if subsequent accesses occur to
other fields in the same word of the structure, but to different bytes.
-@findex SLOW_ZERO_EXTEND
-@item SLOW_ZERO_EXTEND
-Define this macro if zero-extension (of a @code{char} or @code{short}
-to an @code{int}) can be done faster if the destination is a register
-that is known to be zero.
-
-If you define this macro, you must have instruction patterns that
-recognize RTL structures like this:
-
-@smallexample
-(set (strict_low_part (subreg:QI (reg:SI @dots{}) 0)) @dots{})
-@end smallexample
-
-@noindent
-and likewise for @code{HImode}.
-
@findex SLOW_UNALIGNED_ACCESS
@item SLOW_UNALIGNED_ACCESS (@var{mode}, @var{alignment})
Define this macro to be the value 1 if memory accesses described by the
Index: config/1750a/1750a.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/1750a/1750a.h,v
retrieving revision 1.34
diff -u -r1.34 1750a.h
--- 1750a.h 2002/01/08 22:51:19 1.34
+++ 1750a.h 2002/01/16 02:30:23
@@ -770,9 +770,6 @@
move-instruction pairs, we will do a movstr or libcall instead. */
#define MOVE_RATIO 4
-/* Define this if zero-extension is slow (more than one real instruction). */
-/* #define SLOW_ZERO_EXTEND */
-
/* Nonzero if access to memory by bytes is slow and undesirable. */
#define SLOW_BYTE_ACCESS 0
Index: config/arm/arm.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.h,v
retrieving revision 1.132
diff -u -r1.132 arm.h
--- arm.h 2002/01/15 20:20:19 1.132
+++ arm.h 2002/01/16 02:30:23
@@ -2385,11 +2385,6 @@
((arm_arch4 || (MODE) == QImode) ? ZERO_EXTEND \
: ((BYTES_BIG_ENDIAN && (MODE) == HImode) ? SIGN_EXTEND : NIL)))
-/* Define this if zero-extension is slow (more than one real instruction).
- On the ARM, it is more than one instruction only if not fetching from
- memory. */
-/* #define SLOW_ZERO_EXTEND */
-
/* Nonzero if access to memory by bytes is slow and undesirable. */
#define SLOW_BYTE_ACCESS 0
Index: config/avr/avr.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/avr/avr.h,v
retrieving revision 1.39
diff -u -r1.39 avr.h
--- avr.h 2002/01/08 22:51:22 1.39
+++ avr.h 2002/01/16 02:30:24
@@ -1797,18 +1797,6 @@
subsequent accesses occur to other fields in the same word of the
structure, but to different bytes.
- `SLOW_ZERO_EXTEND'
- Define this macro if zero-extension (of a `char' or `short' to an
- `int') can be done faster if the destination is a register that is
- known to be zero.
-
- If you define this macro, you must have instruction patterns that
- recognize RTL structures like this:
-
- (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
-
- and likewise for `HImode'.
-
`SLOW_UNALIGNED_ACCESS'
Define this macro to be the value 1 if unaligned accesses have a
cost many times greater than aligned accesses, for example if they
Index: config/clipper/clipper.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/clipper/clipper.h,v
retrieving revision 1.23
diff -u -r1.23 clipper.h
--- clipper.h 2002/01/08 22:51:25 1.23
+++ clipper.h 2002/01/16 02:30:24
@@ -796,9 +796,6 @@
#define MOVE_RATIO 20
-/* Define this if zero-extension is slow (more than one real instruction). */
-/* #define SLOW_ZERO_EXTEND */
-
/* Nonzero if access to memory by bytes is slow and undesirable. */
#define SLOW_BYTE_ACCESS 0
Index: config/convex/convex.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/convex/convex.h,v
retrieving revision 1.27
diff -u -r1.27 convex.h
--- convex.h 2002/01/08 22:51:25 1.27
+++ convex.h 2002/01/16 02:30:25
@@ -1031,9 +1031,6 @@
in one reasonably fast instruction. */
#define MOVE_MAX 8
-/* Define this if zero-extension is slow (more than one real instruction). */
-/* #define SLOW_ZERO_EXTEND */
-
/* Nonzero if access to memory by bytes is slow and undesirable. */
#define SLOW_BYTE_ACCESS (! TARGET_C2)
Index: config/d30v/d30v.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/d30v/d30v.h,v
retrieving revision 1.44
diff -u -r1.44 d30v.h
--- d30v.h 2002/01/08 22:51:26 1.44
+++ d30v.h 2002/01/16 02:30:26
@@ -3432,17 +3432,6 @@
same word of the structure, but to different bytes. */
#define SLOW_BYTE_ACCESS 1
-/* Define this macro if zero-extension (of a `char' or `short' to an `int') can
- be done faster if the destination is a register that is known to be zero.
-
- If you define this macro, you must have instruction patterns that recognize
- RTL structures like this:
-
- (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
-
- and likewise for `HImode'. */
-#define SLOW_ZERO_EXTEND 0
-
/* Define this macro to be the value 1 if unaligned accesses have a cost many
times greater than aligned accesses, for example if they are emulated in a
trap handler.
Index: config/dsp16xx/dsp16xx.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/dsp16xx/dsp16xx.h,v
retrieving revision 1.38
diff -u -r1.38 dsp16xx.h
--- dsp16xx.h 2002/01/15 20:20:21 1.38
+++ dsp16xx.h 2002/01/16 02:30:26
@@ -1565,10 +1565,6 @@
loads. */
#define SLOW_BYTE_ACCESS 1
-/* Define this macro if zero-extension (of a char or short to an int) can
- be done faster if the destination is a register that is know to be zero. */
-/* #define SLOW_ZERO_EXTEND */
-
/* Define this macro if unaligned accesses have a cost many times greater than
aligned accesses, for example if they are emulated in a trap handler */
/* define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) */
Index: config/elxsi/elxsi.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/elxsi/elxsi.h,v
retrieving revision 1.23
diff -u -r1.23 elxsi.h
--- elxsi.h 2002/01/08 22:51:27 1.23
+++ elxsi.h 2002/01/16 02:30:27
@@ -577,9 +577,6 @@
in one reasonably fast instruction. */
#define MOVE_MAX 8
-/* Define this if zero-extension is slow (more than one real instruction). */
-/* #define SLOW_ZERO_EXTEND */
-
/* Nonzero if access to memory by bytes is slow and undesirable. */
#define SLOW_BYTE_ACCESS 0
Index: config/fr30/fr30.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/fr30/fr30.h,v
retrieving revision 1.25
diff -u -r1.25 fr30.h
--- fr30.h 2002/01/08 22:51:28 1.25
+++ fr30.h 2002/01/16 02:30:27
@@ -1359,17 +1359,6 @@
same word of the structure, but to different bytes. */
#define SLOW_BYTE_ACCESS 1
-/* Define this macro if zero-extension (of a `char' or `short' to an `int') can
- be done faster if the destination is a register that is known to be zero.
-
- If you define this macro, you must have instruction patterns that recognize
- RTL structures like this:
-
- (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
-
- and likewise for `HImode'. */
-#define SLOW_ZERO_EXTEND 0
-
/*}}}*/
/*{{{ Dividing the output into sections. */
Index: config/h8300/h8300.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.h,v
retrieving revision 1.67
diff -u -r1.67 h8300.h
--- h8300.h 2002/01/10 21:30:32 1.67
+++ h8300.h 2002/01/16 02:30:27
@@ -965,9 +965,6 @@
#define MOVE_MAX (TARGET_H8300H || TARGET_H8300S ? 4 : 2)
#define MAX_MOVE_MAX 4
-/* Define this if zero-extension is slow (more than one real instruction). */
-/* #define SLOW_ZERO_EXTEND */
-
/* Nonzero if access to memory by bytes is slow and undesirable. */
#define SLOW_BYTE_ACCESS TARGET_SLOWBYTE
Index: config/i370/i370.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i370/i370.h,v
retrieving revision 1.36
diff -u -r1.36 i370.h
--- i370.h 2002/01/08 22:51:29 1.36
+++ i370.h 2002/01/16 02:30:28
@@ -874,10 +874,6 @@
#define MOVE_MAX 256
-/* Define this if zero-extension is slow (more than one real instruction). */
-
-#define SLOW_ZERO_EXTEND 1
-
/* Nonzero if access to memory by bytes is slow and undesirable. */
#define SLOW_BYTE_ACCESS 1
Index: config/i386/i386.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.h,v
retrieving revision 1.237
diff -u -r1.237 i386.h
--- i386.h 2002/01/12 10:05:26 1.237
+++ i386.h 2002/01/16 02:30:28
@@ -2681,19 +2681,6 @@
/* Nonzero if access to memory by shorts is slow and undesirable. */
#define SLOW_SHORT_ACCESS 0
-/* Define this macro if zero-extension (of a `char' or `short' to an
- `int') can be done faster if the destination is a register that is
- known to be zero.
-
- If you define this macro, you must have instruction patterns that
- recognize RTL structures like this:
-
- (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
-
- and likewise for `HImode'. */
-
-/* #define SLOW_ZERO_EXTEND */
-
/* Define this macro to be the value 1 if unaligned accesses have a
cost many times greater than aligned accesses, for example if they
are emulated in a trap handler.
Index: config/m68k/m68k.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m68k/m68k.h,v
retrieving revision 1.63
diff -u -r1.63 m68k.h
--- m68k.h 2002/01/08 22:51:34 1.63
+++ m68k.h 2002/01/16 02:30:29
@@ -1529,9 +1529,6 @@
in one reasonably fast instruction. */
#define MOVE_MAX 4
-/* Define this if zero-extension is slow (more than one real instruction). */
-#define SLOW_ZERO_EXTEND
-
/* Nonzero if access to memory by bytes is slow and undesirable. */
#define SLOW_BYTE_ACCESS 0
Index: config/mips/mips.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.h,v
retrieving revision 1.147
diff -u -r1.147 mips.h
--- mips.h 2002/01/14 23:27:59 1.147
+++ mips.h 2002/01/16 02:30:30
@@ -3378,9 +3378,6 @@
#define STORE_FLAG_VALUE 1
-/* Define this if zero-extension is slow (more than one real instruction). */
-#define SLOW_ZERO_EXTEND
-
/* Define this to be nonzero if shift instructions ignore all but the low-order
few bits. */
#define SHIFT_COUNT_TRUNCATED 1
Index: config/ns32k/ns32k.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ns32k/ns32k.h,v
retrieving revision 1.32
diff -u -r1.32 ns32k.h
--- ns32k.h 2002/01/08 22:51:39 1.32
+++ ns32k.h 2002/01/16 02:30:30
@@ -1116,9 +1116,6 @@
We have a smart movstrsi insn */
#define MOVE_RATIO 0
-/* Define this if zero-extension is slow (more than one real instruction). */
-/* #define SLOW_ZERO_EXTEND */
-
/* Nonzero if access to memory by bytes is slow and undesirable. */
#define SLOW_BYTE_ACCESS 0
Index: config/pdp11/pdp11.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pdp11/pdp11.h,v
retrieving revision 1.32
diff -u -r1.32 pdp11.h
--- pdp11.h 2002/01/15 20:20:23 1.32
+++ pdp11.h 2002/01/16 02:30:30
@@ -888,9 +888,6 @@
#define MOVE_MAX 2
-/* Zero extension is faster if the target is known to be zero */
-/* #define SLOW_ZERO_EXTEND */
-
/* Nonzero if access to memory by byte is slow and undesirable. -
*/
#define SLOW_BYTE_ACCESS 0
Index: config/pj/pj.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pj/pj.h,v
retrieving revision 1.17
diff -u -r1.17 pj.h
--- pj.h 2002/01/08 22:51:40 1.17
+++ pj.h 2002/01/16 02:30:31
@@ -932,11 +932,6 @@
#define SHORT_IMMEDIATES_SIGN_EXTEND
-/* Define this if zero-extension is slow (more than one real
- instruction). */
-
-/* #define SLOW_ZERO_EXTEND */
-
/* Nonzero if access to memory by bytes is no faster than for words. */
#define SLOW_BYTE_ACCESS 1
Index: config/s390/s390.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.h,v
retrieving revision 1.17
diff -u -r1.17 s390.h
--- s390.h 2002/01/08 22:51:43 1.17
+++ s390.h 2002/01/16 02:30:31
@@ -1061,10 +1061,6 @@
#define MOVE_MAX 256
-/* Define this if zero-extension is slow (more than one real instruction). */
-
-#define SLOW_ZERO_EXTEND
-
/* Nonzero if access to memory by bytes is slow and undesirable. */
#define SLOW_BYTE_ACCESS 1
Index: config/sh/sh.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.h,v
retrieving revision 1.126
diff -u -r1.126 sh.h
--- sh.h 2002/01/08 22:51:43 1.126
+++ sh.h 2002/01/16 02:30:32
@@ -1682,10 +1682,6 @@
/* Define if loading short immediate values into registers sign extends. */
#define SHORT_IMMEDIATES_SIGN_EXTEND
-/* Define this if zero-extension is slow (more than one real instruction).
- On the SH, it's only one instruction. */
-/* #define SLOW_ZERO_EXTEND */
-
/* Nonzero if access to memory by bytes is no faster than for words. */
#define SLOW_BYTE_ACCESS 1
Index: config/stormy16/stormy16.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/stormy16/stormy16.h,v
retrieving revision 1.33
diff -u -r1.33 stormy16.h
--- stormy16.h 2002/01/15 20:20:24 1.33
+++ stormy16.h 2002/01/16 02:30:33
@@ -3193,17 +3193,6 @@
same word of the structure, but to different bytes. */
#define SLOW_BYTE_ACCESS 0
-/* Define this macro if zero-extension (of a `char' or `short' to an `int') can
- be done faster if the destination is a register that is known to be zero.
-
- If you define this macro, you must have instruction patterns that recognize
- RTL structures like this:
-
- (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
-
- and likewise for `HImode'. */
-#define SLOW_ZERO_EXTEND 0
-
/* Define this macro to be the value 1 if unaligned accesses have a cost many
times greater than aligned accesses, for example if they are emulated in a
trap handler.
Index: config/v850/v850.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/v850/v850.h,v
retrieving revision 1.54
diff -u -r1.54 v850.h
--- v850.h 2002/01/08 22:51:45 1.54
+++ v850.h 2002/01/16 02:30:33
@@ -1031,9 +1031,6 @@
than accessing full words. */
#define SLOW_BYTE_ACCESS 1
-/* Define this if zero-extension is slow (more than one real instruction). */
-#define SLOW_ZERO_EXTEND
-
/* According expr.c, a value of around 6 should minimize code size, and
for the V850 series, that's our primary concern. */
#define MOVE_RATIO 6
Index: config/vax/vax.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/vax/vax.h,v
retrieving revision 1.32
diff -u -r1.32 vax.h
--- vax.h 2002/01/15 22:37:00 1.32
+++ vax.h 2002/01/16 02:30:33
@@ -807,9 +807,6 @@
in one reasonably fast instruction. */
#define MOVE_MAX 8
-/* Define this if zero-extension is slow (more than one real instruction). */
-/* #define SLOW_ZERO_EXTEND */
-
/* Nonzero if access to memory by bytes is slow and undesirable. */
#define SLOW_BYTE_ACCESS 0
Index: config/we32k/we32k.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/we32k/we32k.h,v
retrieving revision 1.23
diff -u -r1.23 we32k.h
--- we32k.h 2002/01/08 22:51:46 1.23
+++ we32k.h 2002/01/16 02:30:34
@@ -599,9 +599,6 @@
in one reasonably fast instruction. */
#define MOVE_MAX 4
-/* Define this if zero-extension is slow (more than one real instruction). */
-/* #define SLOW_ZERO_EXTEND */
-
/* Nonzero if access to memory by bytes is slow and undesirable. */
#define SLOW_BYTE_ACCESS 0