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Re: Fix predicate in decrement_and_branch_until_zero pattern on PA
- From: law at redhat dot com
- To: "John David Anglin" <dave at hiauly1 dot hia dot nrc dot ca>
- Cc: rth at redhat dot com, gcc-patches at gcc dot gnu dot org
- Date: Wed, 09 Jan 2002 13:51:53 -0700
- Subject: Re: Fix predicate in decrement_and_branch_until_zero pattern on PA
- Reply-to: law at redhat dot com
> > As the pattern indicates the underlying problem is that it is a
> > conditional jump pattern which also has other outputs. So if any
> > output reloads are needed, they must be handled by the pattern, not
> > by reload.
>
> I suppose if the frame offset is huge we're out to lunch with the
> current code.
Unsure. There is at least some chance that the address will be properly
reloaded, but I certainly wouldn't be the house on it.
> It also can't handle any strange MEMs that might be
> created after combine.
Yes.
It also can't handle the case where the counter is in the SAR register.
There was a time when this pattern made a notable performance difference,
but with the way multi-output instructions are handled on PA8000 and newer
machines it may not be worth the pain to support this pattern. I'd support
removing it (along with with movb variants) if benchmarks show it's a wash.
jeff
way instruction issue works on