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[X86] misc patches for i386.h
- From: Graham Stott <grahams at redhat dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Sun, 06 Jan 2002 06:18:28 +0000
- Subject: [X86] misc patches for i386.h
All,
The attached patch tidies up i386.h it's long and boring.
Bootstrapped i686-pc-linux-gnu, enable-checking, all languages
inclduing ada, no regressions.
Graham
ChangeLog
* config/i386/i386.h: Update copyright date.
(HALF_PIC_PTR): Add parenthesis.
(OPTIMIZATION_OPTIONS): Whitespace, add parenthesis and wrap.
(CONSTANT_ALIGNMENT): Add parenthesis.
(DATA_ALIGNMENT): Likewise.
(LOCAL_ALIGNMENT): Likewise.
(FUNCTION_ARG_BOUNDARY): Whitespace, add parenthesis and wrap.
(IS_STACK_MODE): Uppercase macro parameter, add parenthesis and wrap.
(CONDITIONAL_REGISTER_USAGE): Wrap in do {...} while (0).
(HARD_REGNO_NREGS): Add paranethesis.
(VALID_SSE_REG_MODE): Whitespace.
(VALID_MMX_REG_MODE): Whitespace.
(VALID_FP_MODE_P): Uppercase macros parameter and whitespace.
(ix86_hard_regno_mode_ok): Add parenthesis.
(HARD_REGNO_CALLER_SAVE_MODE): Whitespace.
(RETURN_IN_MEMORY): Whitespace.
(N_REG_CLASSES): Add parenthesis.
(INTEGER_CLASS_P): Add parenthesis and wrap.
(FLOAT_CLASS_P): Likewise.
(SSE_CLASS_P): Likewise.
(MMX_CLASS_P): Likewise.
(MAYBE_INTEGER_CLASS_P): Likewise.
(MAYBE_FLOAT_CLASS_P): Likewise.
(MAYBE_SSE_CLASS_P): Likewise.
(MAYBE_MMX_CLASS_P): Likewise.
(Q_CLASS_P): Likewise.
(REGNO_REG_CLASS): Add parenthesis.
(GENERAL_REGNO_P): Uppercase macro parameter.
(REX_INT_REGNO_P): Uppercase macro parameter and wrap.
(FP_REGNO_P): Likewise.
(ANY_FP_REGNO_P): Uppercase macro parameter.
(SSE_REGNO_P): Likewise.
(SSE_REGNO): Likewise.
(SSE_REG_P): Likewise.
(SSE_FLOAT_MODE_P): Likewise.
(MMX_REGNO_P): Likewise.
(MMX_REG_P):Likewise.
(STACK_REG_P): Likewise.
(NON_STACK_REG_P): Likewise.
(STACK_TOP_P): Likewise.
(CONVERT_HARD_REGISTER_TO_SSA_P): Add parenthesis.
(PREFERRED_RELOAD_CLASS): Add parenthesis and whitespace.
(SECONDARY_MEMORY_NEEDED): Likewise.
(SECONDARY_OUTPUT_RELOAD_CLASS): Whitespace.
(MD_ASM_CLOBBERS): Whitespace and wrap.
(MUST_PASS_IN_STACK): Whitespace and wrap.
(RETURN_POPS_ARGS): Add perenthesis.
(INIT_CUMULATIVE_ARGS): Likewise.
(FUNCTION_ARG): Likewise.
(FUNCTION_OK_FOR_SIBCALL): Add parenthesis and whitespace.
(SETUP_INCOMING_VARARGS): Likewise.
(BUILD_VA_LIST_TYPE): Add perenthesis.
(EXPAND_BUILTIN_VA_START): Uppercase macro paremeters and add
parenthsis.
(EXPAND_BUILTIN_VA_ARG): Likewise.
(FUNCTION_PROFILER): Wrap in do { ... } while (0) and add parenthesis.
(INITIALIZE_TRAMPOLINE): Add perenthesis.
(INITIAL_ELIMINATION_OFFSET): Likewise.
(REGNO_OK_FOR_INDEX_P): Add parenthesis.
(REGNO_OK_FOR_BASE_P): Likewise.
(REGNO_OK_FOR_SIREG_P): Add parenthesis and wrap.
(REGNO_OK_FOR_DIREG_P): Likewise.
(REG_OK_FOR_INDEX_P): Whitespace.
(REG_OK_FOR_BASE_P): Whitespace.
(GO_IF_LEGITIMATE_ADDRESS): Wrap in do { ... } while (0) and add
parenthesis.
(FIND_BASE_TERM): Fix typo.
(LEGITIMIZE_ADDRESS): Wrap in { .. } while (0) and add parenthesis.
(REWRITE_ADDRESS): Uppercase macro parameter and whitespace.
(SYMBOLIC_CONST; Whitespace.
(GO_IF_MODE_DEPENDENT_ADDRESS):Wrap in { .. } while (0) and wrap.
(ENCODE_SECTION_INFO): Whitespace.
(FINALIZE_PIC): Remove do { ... } while (0).
(PROMOTE_MODE): Wrap in do { ... } while (0).
(CONST_COSTS): Whitespace.
(RTX_COSTS): Add paramethesis, whitespace and wrap.
(REGISTER_MOVE_COST): Add parenthesis.
(MEMORY_MOVE_COST): Likewise.
(EXTRA_CC_MODES): Whitespace.
(SELECT_CC_MODE): Add parenthesis and whitespace.
(DBX_REGISTER_NUMBER): Uppercase macro parameter and add parenthsis.
(ASM_PREFERRED_EH_DATA_FORMAT): Add parenthesis and whitespace.
(ASM_OUTPUT_LABEL): Add paramethesis.
(ASM_OUTPUT_REG_PUSH): Add parenthesis and whitespace.
(ASM_OUTPUT_REG_POP): Likewise.
(ASM_OUTPUT_ADDR_VEC_ELT): Add paranethesis.
(ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
Index: i386.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.h,v
retrieving revision 1.232
diff -c -p -r1.232 i386.h
*** i386.h 2002/01/03 17:40:02 1.232
--- i386.h 2002/01/06 05:24:50
***************
*** 1,6 ****
/* Definitions of target machine for GNU compiler for IA-32.
Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
! 2001 Free Software Foundation, Inc.
This file is part of GNU CC.
--- 1,6 ----
/* Definitions of target machine for GNU compiler for IA-32.
Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
! 2001, 2002 Free Software Foundation, Inc.
This file is part of GNU CC.
*************** Boston, MA 02111-1307, USA. */
*** 44,50 ****
#define HALF_PIC_DECLARE(NAME)
#define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it")
#define HALF_PIC_ADDRESS_P(X) 0
! #define HALF_PIC_PTR(X) X
#define HALF_PIC_FINISH(STREAM)
#endif
--- 44,50 ----
#define HALF_PIC_DECLARE(NAME)
#define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it")
#define HALF_PIC_ADDRESS_P(X) 0
! #define HALF_PIC_PTR(X) (X)
#define HALF_PIC_FINISH(STREAM)
#endif
*************** extern int ix86_arch;
*** 464,470 ****
#define SUBTARGET_OPTIONS
/* Define this to change the optimizations performed by default. */
! #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE)
/* Specs for the compiler proper */
--- 464,471 ----
#define SUBTARGET_OPTIONS
/* Define this to change the optimizations performed by default. */
! #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \
! optimization_options ((LEVEL), (SIZE))
/* Specs for the compiler proper */
*************** march=athlon|march=athlon-tbird|march=at
*** 794,800 ****
constants to be word aligned so that `strcpy' calls that copy
constants can be done inline. */
! #define CONSTANT_ALIGNMENT(EXP, ALIGN) ix86_constant_alignment (EXP, ALIGN)
/* If defined, a C expression to compute the alignment for a static
variable. TYPE is the data type, and ALIGN is the alignment that
--- 795,801 ----
constants to be word aligned so that `strcpy' calls that copy
constants can be done inline. */
! #define CONSTANT_ALIGNMENT(EXP, ALIGN) ix86_constant_alignment ((EXP), (ALIGN))
/* If defined, a C expression to compute the alignment for a static
variable. TYPE is the data type, and ALIGN is the alignment that
*************** march=athlon|march=athlon-tbird|march=at
*** 808,814 ****
cause character arrays to be word-aligned so that `strcpy' calls
that copy constants to character arrays can be done inline. */
! #define DATA_ALIGNMENT(TYPE, ALIGN) ix86_data_alignment (TYPE, ALIGN)
/* If defined, a C expression to compute the alignment for a local
variable. TYPE is the data type, and ALIGN is the alignment that
--- 809,815 ----
cause character arrays to be word-aligned so that `strcpy' calls
that copy constants to character arrays can be done inline. */
! #define DATA_ALIGNMENT(TYPE, ALIGN) ix86_data_alignment ((TYPE), (ALIGN))
/* If defined, a C expression to compute the alignment for a local
variable. TYPE is the data type, and ALIGN is the alignment that
*************** march=athlon|march=athlon-tbird|march=at
*** 820,832 ****
One use of this macro is to increase alignment of medium-size
data to make it all fit in fewer cache lines. */
! #define LOCAL_ALIGNMENT(TYPE, ALIGN) ix86_local_alignment (TYPE, ALIGN)
/* If defined, a C expression that gives the alignment boundary, in
bits, of an argument with the specified mode and type. If it is
not defined, `PARM_BOUNDARY' is used for all arguments. */
! #define FUNCTION_ARG_BOUNDARY(MODE,TYPE) ix86_function_arg_boundary (MODE, TYPE)
/* Set this non-zero if move instructions will actually fail to work
when given unaligned data. */
--- 821,834 ----
One use of this macro is to increase alignment of medium-size
data to make it all fit in fewer cache lines. */
! #define LOCAL_ALIGNMENT(TYPE, ALIGN) ix86_local_alignment ((TYPE), (ALIGN))
/* If defined, a C expression that gives the alignment boundary, in
bits, of an argument with the specified mode and type. If it is
not defined, `PARM_BOUNDARY' is used for all arguments. */
! #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
! ix86_function_arg_boundary ((MODE), (TYPE))
/* Set this non-zero if move instructions will actually fail to work
when given unaligned data. */
*************** march=athlon|march=athlon-tbird|march=at
*** 843,850 ****
for details. */
#define STACK_REGS
! #define IS_STACK_MODE(mode) (mode==DFmode || mode==SFmode \
! || mode==XFmode || mode==TFmode)
/* Number of actual hardware registers.
The hardware registers are assigned numbers for the compiler
--- 845,853 ----
for details. */
#define STACK_REGS
! #define IS_STACK_MODE(MODE) \
! ((MODE) == DFMODE || (MODE) == SFMODE || (MODE) == XFMODE \
! || (MODE) == TFMODE)
/* Number of actual hardware registers.
The hardware registers are assigned numbers for the compiler
*************** march=athlon|march=athlon-tbird|march=at
*** 958,964 ****
/* Macro to conditionally modify fixed_regs/call_used_regs. */
#define CONDITIONAL_REGISTER_USAGE \
! { \
int i; \
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \
{ \
--- 961,967 ----
/* Macro to conditionally modify fixed_regs/call_used_regs. */
#define CONDITIONAL_REGISTER_USAGE \
! do { \
int i; \
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \
{ \
*************** march=athlon|march=athlon-tbird|march=at
*** 994,1000 ****
if (TEST_HARD_REG_BIT (x, i)) \
fixed_regs[i] = call_used_regs[i] = 1; \
} \
! }
/* Return number of consecutive hard regs needed starting at reg REGNO
to hold something of mode MODE.
--- 997,1003 ----
if (TEST_HARD_REG_BIT (x, i)) \
fixed_regs[i] = call_used_regs[i] = 1; \
} \
! } while (0)
/* Return number of consecutive hard regs needed starting at reg REGNO
to hold something of mode MODE.
*************** march=athlon|march=athlon-tbird|march=at
*** 1009,1030 ****
#define HARD_REGNO_NREGS(REGNO, MODE) \
(FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \
? (COMPLEX_MODE_P (MODE) ? 2 : 1) \
! : (MODE == TFmode \
? (TARGET_64BIT ? 2 : 3) \
! : MODE == TCmode \
? (TARGET_64BIT ? 4 : 6) \
: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
! #define VALID_SSE_REG_MODE(MODE) \
! ((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \
! || (MODE) == SFmode \
|| (TARGET_SSE2 && ((MODE) == DFmode || VALID_MMX_REG_MODE (MODE))))
#define VALID_MMX_REG_MODE_3DNOW(MODE) \
((MODE) == V2SFmode || (MODE) == SFmode)
! #define VALID_MMX_REG_MODE(MODE) \
! ((MODE) == DImode || (MODE) == V8QImode || (MODE) == V4HImode \
|| (MODE) == V2SImode || (MODE) == SImode)
#define VECTOR_MODE_SUPPORTED_P(MODE) \
--- 1012,1033 ----
#define HARD_REGNO_NREGS(REGNO, MODE) \
(FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \
? (COMPLEX_MODE_P (MODE) ? 2 : 1) \
! : ((MODE) == TFmode \
? (TARGET_64BIT ? 2 : 3) \
! : (MODE) == TCmode \
? (TARGET_64BIT ? 4 : 6) \
: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
! #define VALID_SSE_REG_MODE(MODE) \
! ((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \
! || (MODE) == SFmode \
|| (TARGET_SSE2 && ((MODE) == DFmode || VALID_MMX_REG_MODE (MODE))))
#define VALID_MMX_REG_MODE_3DNOW(MODE) \
((MODE) == V2SFmode || (MODE) == SFmode)
! #define VALID_MMX_REG_MODE(MODE) \
! ((MODE) == DImode || (MODE) == V8QImode || (MODE) == V4HImode \
|| (MODE) == V2SImode || (MODE) == SImode)
#define VECTOR_MODE_SUPPORTED_P(MODE) \
*************** march=athlon|march=athlon-tbird|march=at
*** 1032,1054 ****
: VALID_MMX_REG_MODE (MODE) && TARGET_MMX ? 1 \
: VALID_MMX_REG_MODE_3DNOW (MODE) && TARGET_3DNOW ? 1 : 0)
! #define VALID_FP_MODE_P(mode) \
! ((mode) == SFmode || (mode) == DFmode || (mode) == TFmode \
! || (!TARGET_64BIT && (mode) == XFmode) \
! || (mode) == SCmode || (mode) == DCmode || (mode) == TCmode\
! || (!TARGET_64BIT && (mode) == XCmode))
!
! #define VALID_INT_MODE_P(mode) \
! ((mode) == QImode || (mode) == HImode || (mode) == SImode \
! || (mode) == DImode \
! || (mode) == CQImode || (mode) == CHImode || (mode) == CSImode \
! || (mode) == CDImode \
! || (TARGET_64BIT && ((mode) == TImode || (mode) == CTImode)))
/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
! ix86_hard_regno_mode_ok (REGNO, MODE)
/* Value is 1 if it is a good idea to tie two pseudo registers
when one has mode MODE1 and one has mode MODE2.
--- 1035,1057 ----
: VALID_MMX_REG_MODE (MODE) && TARGET_MMX ? 1 \
: VALID_MMX_REG_MODE_3DNOW (MODE) && TARGET_3DNOW ? 1 : 0)
! #define VALID_FP_MODE_P(MODE) \
! ((MODE) == SFmode || (MODE) == DFmode || (MODE) == TFmode \
! || (!TARGET_64BIT && (MODE) == XFmode) \
! || (MODE) == SCmode || (MODE) == DCmode || (MODE) == TCmode \
! || (!TARGET_64BIT && (MODE) == XCmode))
!
! #define VALID_INT_MODE_P(MODE) \
! ((MODE) == QImode || (MODE) == HImode || (MODE) == SImode \
! || (MODE) == DImode \
! || (MODE) == CQImode || (MODE) == CHImode || (MODE) == CSImode \
! || (MODE) == CDImode \
! || (TARGET_64BIT && ((MODE) == TImode || (MODE) == CTImode)))
/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
! ix86_hard_regno_mode_ok ((REGNO), (MODE))
/* Value is 1 if it is a good idea to tie two pseudo registers
when one has mode MODE1 and one has mode MODE2.
*************** march=athlon|march=athlon-tbird|march=at
*** 1072,1083 ****
Kill any attempts to combine saving of modes. */
! #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
! (CC_REGNO_P (REGNO) ? VOIDmode \
! : (MODE) == VOIDmode && (NREGS) != 1 ? VOIDmode \
! : (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS)) \
! : (MODE) == HImode && !TARGET_PARTIAL_REG_STALL ? SImode \
! : (MODE) == QImode && (REGNO) >= 4 && !TARGET_64BIT ? SImode \
: (MODE))
/* Specify the registers used for certain standard purposes.
The values of these macros are register numbers. */
--- 1075,1086 ----
Kill any attempts to combine saving of modes. */
! #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
! (CC_REGNO_P (REGNO) ? VOIDmode \
! : (MODE) == VOIDmode && (NREGS) != 1 ? VOIDmode \
! : (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS)) \
! : (MODE) == HImode && !TARGET_PARTIAL_REG_STALL ? SImode \
! : (MODE) == QImode && (REGNO) >= 4 && !TARGET_64BIT ? SImode \
: (MODE))
/* Specify the registers used for certain standard purposes.
The values of these macros are register numbers. */
*************** march=athlon|march=athlon-tbird|march=at
*** 1174,1180 ****
should always be returned in memory. You should instead use
`DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
! #define RETURN_IN_MEMORY(TYPE) \
ix86_return_in_memory (TYPE)
--- 1177,1183 ----
should always be returned in memory. You should instead use
`DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
! #define RETURN_IN_MEMORY(TYPE) \
ix86_return_in_memory (TYPE)
*************** enum reg_class
*** 1227,1244 ****
ALL_REGS, LIM_REG_CLASSES
};
! #define N_REG_CLASSES (int) LIM_REG_CLASSES
! #define INTEGER_CLASS_P(CLASS) (reg_class_subset_p (CLASS, GENERAL_REGS))
! #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
! #define SSE_CLASS_P(CLASS) (reg_class_subset_p (CLASS, SSE_REGS))
! #define MMX_CLASS_P(CLASS) (reg_class_subset_p (CLASS, MMX_REGS))
! #define MAYBE_INTEGER_CLASS_P(CLASS) (reg_classes_intersect_p (CLASS, GENERAL_REGS))
! #define MAYBE_FLOAT_CLASS_P(CLASS) (reg_classes_intersect_p (CLASS, FLOAT_REGS))
! #define MAYBE_SSE_CLASS_P(CLASS) (reg_classes_intersect_p (SSE_REGS, CLASS))
! #define MAYBE_MMX_CLASS_P(CLASS) (reg_classes_intersect_p (MMX_REGS, CLASS))
! #define Q_CLASS_P(CLASS) (reg_class_subset_p (CLASS, Q_REGS))
/* Give names of register classes as strings for dump file. */
--- 1230,1256 ----
ALL_REGS, LIM_REG_CLASSES
};
! #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
! #define INTEGER_CLASS_P(CLASS) \
! reg_class_subset_p ((CLASS), GENERAL_REGS)
! #define FLOAT_CLASS_P(CLASS) \
! reg_class_subset_p ((CLASS), FLOAT_REGS)
! #define SSE_CLASS_P(CLASS) \
! reg_class_subset_p ((CLASS), SSE_REGS)
! #define MMX_CLASS_P(CLASS) \
! reg_class_subset_p ((CLASS), MMX_REGS)
! #define MAYBE_INTEGER_CLASS_P(CLASS) \
! reg_classes_intersect_p ((CLASS), GENERAL_REGS)
! #define MAYBE_FLOAT_CLASS_P(CLASS) \
! reg_classes_intersect_p ((CLASS), FLOAT_REGS)
! #define MAYBE_SSE_CLASS_P(CLASS) \
! reg_classes_intersect_p (SSE_REGS, (CLASS))
! #define MAYBE_MMX_CLASS_P(CLASS) \
! reg_classes_intersect_p (MMX_REGS, (CLASS))
! #define Q_CLASS_P(CLASS) \
! reg_class_subset_p ((CLASS), Q_REGS)
/* Give names of register classes as strings for dump file. */
*************** enum reg_class
*** 1296,1302 ****
reg number REGNO. This could be a conditional expression
or could index an array. */
! #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
/* When defined, the compiler allows registers explicitly used in the
rtl to be used as spill registers but prevents the compiler from
--- 1308,1314 ----
reg number REGNO. This could be a conditional expression
or could index an array. */
! #define REGNO_REG_CLASS(REGNO) (regclass_map[(REGNO)])
/* When defined, the compiler allows registers explicitly used in the
rtl to be used as spill registers but prevents the compiler from
*************** enum reg_class
*** 1307,1314 ****
#define QI_REG_P(X) \
(REG_P (X) && REGNO (X) < 4)
! #define GENERAL_REGNO_P(n) \
! ((n) < 8 || REX_INT_REGNO_P (n))
#define GENERAL_REG_P(X) \
(REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
--- 1319,1326 ----
#define QI_REG_P(X) \
(REG_P (X) && REGNO (X) < 4)
! #define GENERAL_REGNO_P(N) \
! ((N) < 8 || REX_INT_REGNO_P (N))
#define GENERAL_REG_P(X) \
(REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
*************** enum reg_class
*** 1318,1352 ****
#define NON_QI_REG_P(X) \
(REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
! #define REX_INT_REGNO_P(n) ((n) >= FIRST_REX_INT_REG && (n) <= LAST_REX_INT_REG)
#define REX_INT_REG_P(X) (REG_P (X) && REX_INT_REGNO_P (REGNO (X)))
#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
! #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
#define ANY_FP_REG_P(X) (REG_P (X) && ANY_FP_REGNO_P (REGNO (X)))
! #define ANY_FP_REGNO_P(n) (FP_REGNO_P (n) || SSE_REGNO_P (n))
! #define SSE_REGNO_P(n) \
! (((n) >= FIRST_SSE_REG && (n) <= LAST_SSE_REG) \
! || ((n) >= FIRST_REX_SSE_REG && (n) <= LAST_REX_SSE_REG))
! #define SSE_REGNO(n) \
! ((n) < 8 ? FIRST_SSE_REG + (n) : FIRST_REX_SSE_REG + (n) - 8)
! #define SSE_REG_P(n) (REG_P (n) && SSE_REGNO_P (REGNO (n)))
! #define SSE_FLOAT_MODE_P(m) \
! ((TARGET_SSE_MATH && (m) == SFmode) || (TARGET_SSE2 && (m) == DFmode))
! #define MMX_REGNO_P(n) ((n) >= FIRST_MMX_REG && (n) <= LAST_MMX_REG)
! #define MMX_REG_P(xop) (REG_P (xop) && MMX_REGNO_P (REGNO (xop)))
! #define STACK_REG_P(xop) (REG_P (xop) && \
! REGNO (xop) >= FIRST_STACK_REG && \
! REGNO (xop) <= LAST_STACK_REG)
! #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
! #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
#define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X)))
#define CC_REGNO_P(X) ((X) == FLAGS_REG || (X) == FPSR_REG)
--- 1330,1365 ----
#define NON_QI_REG_P(X) \
(REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
! #define REX_INT_REGNO_P(N) ((N) >= FIRST_REX_INT_REG && (N) <= LAST_REX_INT_REG)
#define REX_INT_REG_P(X) (REG_P (X) && REX_INT_REGNO_P (REGNO (X)))
#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
! #define FP_REGNO_P(N) ((N) >= FIRST_STACK_REG && (N) <= LAST_STACK_REG)
#define ANY_FP_REG_P(X) (REG_P (X) && ANY_FP_REGNO_P (REGNO (X)))
! #define ANY_FP_REGNO_P(N) (FP_REGNO_P (N) || SSE_REGNO_P (N))
! #define SSE_REGNO_P(N) \
! (((N) >= FIRST_SSE_REG && (N) <= LAST_SSE_REG) \
! || ((N) >= FIRST_REX_SSE_REG && (N) <= LAST_REX_SSE_REG))
! #define SSE_REGNO(N) \
! ((N) < 8 ? FIRST_SSE_REG + (N) : FIRST_REX_SSE_REG + (N) - 8)
! #define SSE_REG_P(N) (REG_P (N) && SSE_REGNO_P (REGNO (N)))
! #define SSE_FLOAT_MODE_P(MODE) \
! ((TARGET_SSE_MATH && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode))
! #define MMX_REGNO_P(N) ((N) >= FIRST_MMX_REG && (N) <= LAST_MMX_REG)
! #define MMX_REG_P(XOP) (REG_P (XOP) && MMX_REGNO_P (REGNO (XOP)))
! #define STACK_REG_P(XOP) \
! (REG_P (XOP) && \
! REGNO (XOP) >= FIRST_STACK_REG && \
! REGNO (XOP) <= LAST_STACK_REG)
! #define NON_STACK_REG_P(XOP) (REG_P (XOP) && ! STACK_REG_P (XOP))
! #define STACK_TOP_P(XOP) (REG_P (XOP) && REGNO (XOP) == FIRST_STACK_REG)
#define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X)))
#define CC_REGNO_P(X) ((X) == FLAGS_REG || (X) == FPSR_REG)
*************** enum reg_class
*** 1354,1360 ****
/* Indicate whether hard register numbered REG_NO should be converted
to SSA form. */
#define CONVERT_HARD_REGISTER_TO_SSA_P(REG_NO) \
! (REG_NO == FLAGS_REG || REG_NO == ARG_POINTER_REGNUM)
/* The class value for index registers, and the one for base regs. */
--- 1367,1373 ----
/* Indicate whether hard register numbered REG_NO should be converted
to SSA form. */
#define CONVERT_HARD_REGISTER_TO_SSA_P(REG_NO) \
! ((REG_NO) == FLAGS_REG || (REG_NO) == ARG_POINTER_REGNUM)
/* The class value for index registers, and the one for base regs. */
*************** enum reg_class
*** 1459,1477 ****
Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
movdf to do mem-to-mem moves through integer regs. */
! #define PREFERRED_RELOAD_CLASS(X,CLASS) \
! ix86_preferred_reload_class (X, CLASS)
/* If we are copying between general and FP registers, we need a memory
location. The same is true for SSE and MMX registers. */
! #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
! ix86_secondary_memory_needed (CLASS1, CLASS2, MODE, 1)
/* QImode spills from non-QI registers need a scratch. This does not
happen often -- the only example so far requires an uninitialized
pseudo. */
! #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
((CLASS) == GENERAL_REGS && !TARGET_64BIT && (MODE) == QImode \
? Q_REGS : NO_REGS)
--- 1472,1490 ----
Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
movdf to do mem-to-mem moves through integer regs. */
! #define PREFERRED_RELOAD_CLASS(X, CLASS) \
! ix86_preferred_reload_class ((X), (CLASS))
/* If we are copying between general and FP registers, we need a memory
location. The same is true for SSE and MMX registers. */
! #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
! ix86_secondary_memory_needed ((CLASS1), (CLASS2), (MODE), 1)
/* QImode spills from non-QI registers need a scratch. This does not
happen often -- the only example so far requires an uninitialized
pseudo. */
! #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
((CLASS) == GENERAL_REGS && !TARGET_64BIT && (MODE) == QImode \
? Q_REGS : NO_REGS)
*************** enum reg_class
*** 1519,1529 ****
We do this in the new i386 backend to maintain source compatibility
with the old cc0-based compiler. */
! #define MD_ASM_CLOBBERS(CLOBBERS) \
! do { \
! (CLOBBERS) = tree_cons (NULL_TREE, build_string (5, "flags"), (CLOBBERS));\
! (CLOBBERS) = tree_cons (NULL_TREE, build_string (4, "fpsr"), (CLOBBERS)); \
! (CLOBBERS) = tree_cons (NULL_TREE, build_string (7, "dirflag"), (CLOBBERS)); \
} while (0)
/* Stack layout; function entry, exit and calling. */
--- 1532,1545 ----
We do this in the new i386 backend to maintain source compatibility
with the old cc0-based compiler. */
! #define MD_ASM_CLOBBERS(CLOBBERS) \
! do { \
! (CLOBBERS) = tree_cons (NULL_TREE, build_string (5, "flags"), \
! (CLOBBERS)); \
! (CLOBBERS) = tree_cons (NULL_TREE, build_string (4, "fpsr"), \
! (CLOBBERS)); \
! (CLOBBERS) = tree_cons (NULL_TREE, build_string (7, "dirflag"), \
! (CLOBBERS)); \
} while (0)
/* Stack layout; function entry, exit and calling. */
*************** enum reg_class
*** 1590,1605 ****
definition that is usually appropriate, refer to expr.h for additional
documentation. If `REG_PARM_STACK_SPACE' is defined, the argument will be
computed in the stack and then loaded into a register. */
! #define MUST_PASS_IN_STACK(MODE,TYPE) \
! ((TYPE) != 0 \
! && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \
! || TREE_ADDRESSABLE (TYPE) \
! || ((MODE) == TImode) \
! || ((MODE) == BLKmode \
! && ! ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \
! && 0 == (int_size_in_bytes (TYPE) \
! % (PARM_BOUNDARY / BITS_PER_UNIT))) \
! && (FUNCTION_ARG_PADDING (MODE, TYPE) \
== (BYTES_BIG_ENDIAN ? upward : downward)))))
/* Value is the number of bytes of arguments automatically
--- 1606,1622 ----
definition that is usually appropriate, refer to expr.h for additional
documentation. If `REG_PARM_STACK_SPACE' is defined, the argument will be
computed in the stack and then loaded into a register. */
! #define MUST_PASS_IN_STACK(MODE, TYPE) \
! ((TYPE) != 0 \
! && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \
! || TREE_ADDRESSABLE (TYPE) \
! || ((MODE) == TImode) \
! || ((MODE) == BLKmode \
! && ! ((TYPE) != 0 \
! && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \
! && 0 == (int_size_in_bytes (TYPE) \
! % (PARM_BOUNDARY / BITS_PER_UNIT))) \
! && (FUNCTION_ARG_PADDING (MODE, TYPE) \
== (BYTES_BIG_ENDIAN ? upward : downward)))))
/* Value is the number of bytes of arguments automatically
*************** enum reg_class
*** 1619,1626 ****
The attribute stdcall is equivalent to RTD on a per module basis. */
! #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
! (ix86_return_pops_args (FUNDECL, FUNTYPE, SIZE))
/* Define how to find the value returned by a function.
VALTYPE is the data type of the value (as a tree).
--- 1636,1643 ----
The attribute stdcall is equivalent to RTD on a per module basis. */
! #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) \
! ix86_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE))
/* Define how to find the value returned by a function.
VALTYPE is the data type of the value (as a tree).
*************** typedef struct ix86_args {
*** 1667,1681 ****
for a call to a function whose data type is FNTYPE.
For a library call, FNTYPE is 0. */
! #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
! (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
/* Update the data in CUM to advance over an argument
of mode MODE and data type TYPE.
(TYPE is null for libcalls where that information may not be available.) */
! #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
! (function_arg_advance (&CUM, MODE, TYPE, NAMED))
/* Define where to put the arguments to a function.
Value is zero to push the argument on the stack,
--- 1684,1698 ----
for a call to a function whose data type is FNTYPE.
For a library call, FNTYPE is 0. */
! #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \
! init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME))
/* Update the data in CUM to advance over an argument
of mode MODE and data type TYPE.
(TYPE is null for libcalls where that information may not be available.) */
! #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
! function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED))
/* Define where to put the arguments to a function.
Value is zero to push the argument on the stack,
*************** typedef struct ix86_args {
*** 1691,1697 ****
(otherwise it is an extra parameter matching an ellipsis). */
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
! (function_arg (&CUM, MODE, TYPE, NAMED))
/* For an arg passed partly in registers and partly in memory,
this is the number of registers used.
--- 1708,1714 ----
(otherwise it is an extra parameter matching an ellipsis). */
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
! function_arg (&(CUM), (MODE), (TYPE), (NAMED))
/* For an arg passed partly in registers and partly in memory,
this is the number of registers used.
*************** typedef struct ix86_args {
*** 1704,1714 ****
If we are returning floats on the register stack, we cannot make
sibling calls to functions that return floats. (The stack adjust
instruction will wind up after the sibcall jump, and not be executed.) */
! #define FUNCTION_OK_FOR_SIBCALL(DECL) \
! (DECL \
! && (! flag_pic || ! TREE_PUBLIC (DECL)) \
! && (! TARGET_FLOAT_RETURNS_IN_80387 \
! || ! FLOAT_MODE_P (TYPE_MODE (TREE_TYPE (TREE_TYPE (DECL)))) \
|| FLOAT_MODE_P (TYPE_MODE (TREE_TYPE (TREE_TYPE (cfun->decl))))))
/* Perform any needed actions needed for a function that is receiving a
--- 1721,1731 ----
If we are returning floats on the register stack, we cannot make
sibling calls to functions that return floats. (The stack adjust
instruction will wind up after the sibcall jump, and not be executed.) */
! #define FUNCTION_OK_FOR_SIBCALL(DECL) \
! ((DECL) \
! && (! flag_pic || ! TREE_PUBLIC (DECL)) \
! && (! TARGET_FLOAT_RETURNS_IN_80387 \
! || ! FLOAT_MODE_P (TYPE_MODE (TREE_TYPE (TREE_TYPE (DECL)))) \
|| FLOAT_MODE_P (TYPE_MODE (TREE_TYPE (TREE_TYPE (cfun->decl))))))
/* Perform any needed actions needed for a function that is receiving a
*************** typedef struct ix86_args {
*** 1725,1744 ****
Normally, this macro will push all remaining incoming registers on the
stack and set PRETEND_SIZE to the length of the registers pushed. */
! #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
! ix86_setup_incoming_varargs (&CUM, MODE, TYPE, &PRETEND_SIZE, NO_RTL)
/* Define the `__builtin_va_list' type for the ABI. */
#define BUILD_VA_LIST_TYPE(VALIST) \
! (VALIST) = ix86_build_va_list ()
/* Implement `va_start' for varargs and stdarg. */
! #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
! ix86_va_start (stdarg, valist, nextarg)
/* Implement `va_arg'. */
! #define EXPAND_BUILTIN_VA_ARG(valist, type) \
! ix86_va_arg (valist, type)
/* This macro is invoked at the end of compilation. It is used here to
output code for -fpic that will load the return address into %ebx. */
--- 1742,1762 ----
Normally, this macro will push all remaining incoming registers on the
stack and set PRETEND_SIZE to the length of the registers pushed. */
! #define SETUP_INCOMING_VARARGS(CUM, MODE, TYPE, PRETEND_SIZE, NO_RTL) \
! ix86_setup_incoming_varargs (&(CUM), (MODE), (TYPE), &(PRETEND_SIZE), \
! (NO_RTL))
/* Define the `__builtin_va_list' type for the ABI. */
#define BUILD_VA_LIST_TYPE(VALIST) \
! ((VALIST) = ix86_build_va_list ())
/* Implement `va_start' for varargs and stdarg. */
! #define EXPAND_BUILTIN_VA_START(STDARG, VALIST, NEXTARG) \
! ix86_va_start ((STDARG), (VALIST), (NEXTARG))
/* Implement `va_arg'. */
! #define EXPAND_BUILTIN_VA_ARG(VALIST, TYPE) \
! ix86_va_arg ((VALIST), (TYPE))
/* This macro is invoked at the end of compilation. It is used here to
output code for -fpic that will load the return address into %ebx. */
*************** typedef struct ix86_args {
*** 1749,1768 ****
/* Output assembler code to FILE to increment profiler label # LABELNO
for profiling a function entry. */
! #define FUNCTION_PROFILER(FILE, LABELNO) \
! { \
if (flag_pic) \
{ \
! fprintf (FILE, "\tleal\t%sP%d@GOTOFF(%%ebx),%%edx\n", \
LPREFIX, (LABELNO)); \
! fprintf (FILE, "\tcall\t*_mcount@GOT(%%ebx)\n"); \
} \
else \
{ \
! fprintf (FILE, "\tmovl\t$%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
! fprintf (FILE, "\tcall\t_mcount\n"); \
} \
! }
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
the stack pointer does not matter. The value is tested only in
--- 1767,1786 ----
/* Output assembler code to FILE to increment profiler label # LABELNO
for profiling a function entry. */
! #define FUNCTION_PROFILER(FILE, LABELNO) \
! do { \
if (flag_pic) \
{ \
! fprintf ((FILE), "\tleal\t%sP%d@GOTOFF(%%ebx),%%edx\n", \
LPREFIX, (LABELNO)); \
! fprintf ((FILE), "\tcall\t*_mcount@GOT(%%ebx)\n"); \
} \
else \
{ \
! fprintf ((FILE), "\tmovl\t$%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
! fprintf ((FILE), "\tcall\t_mcount\n"); \
} \
! } while (0)
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
the stack pointer does not matter. The value is tested only in
*************** typedef struct ix86_args {
*** 1792,1799 ****
FNADDR is an RTX for the address of the function's pure code.
CXT is an RTX for the static chain value for the function. */
! #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
! x86_initialize_trampoline (TRAMP, FNADDR, CXT)
/* Definitions for register eliminations.
--- 1810,1817 ----
FNADDR is an RTX for the address of the function's pure code.
CXT is an RTX for the static chain value for the function. */
! #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
! x86_initialize_trampoline ((TRAMP), (FNADDR), (CXT))
/* Definitions for register eliminations.
*************** typedef struct ix86_args {
*** 1825,1832 ****
/* Define the offset between two registers, one to be eliminated, and the other
its replacement, at the start of a routine. */
! #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
! (OFFSET) = ix86_initial_elimination_offset (FROM, TO)
/* Addressing modes, and classification of registers for them. */
--- 1843,1850 ----
/* Define the offset between two registers, one to be eliminated, and the other
its replacement, at the start of a routine. */
! #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
! ((OFFSET) = ix86_initial_elimination_offset ((FROM), (TO)))
/* Addressing modes, and classification of registers for them. */
*************** typedef struct ix86_args {
*** 1848,1856 ****
((REGNO) < STACK_POINTER_REGNUM \
|| (REGNO >= FIRST_REX_INT_REG \
&& (REGNO) <= LAST_REX_INT_REG) \
! || ((unsigned) reg_renumber[REGNO] >= FIRST_REX_INT_REG \
! && (unsigned) reg_renumber[REGNO] <= LAST_REX_INT_REG) \
! || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
#define REGNO_OK_FOR_BASE_P(REGNO) \
((REGNO) <= STACK_POINTER_REGNUM \
--- 1866,1874 ----
((REGNO) < STACK_POINTER_REGNUM \
|| (REGNO >= FIRST_REX_INT_REG \
&& (REGNO) <= LAST_REX_INT_REG) \
! || ((unsigned) reg_renumber[(REGNO)] >= FIRST_REX_INT_REG \
! && (unsigned) reg_renumber[(REGNO)] <= LAST_REX_INT_REG) \
! || (unsigned) reg_renumber[(REGNO)] < STACK_POINTER_REGNUM)
#define REGNO_OK_FOR_BASE_P(REGNO) \
((REGNO) <= STACK_POINTER_REGNUM \
*************** typedef struct ix86_args {
*** 1858,1869 ****
|| (REGNO) == FRAME_POINTER_REGNUM \
|| (REGNO >= FIRST_REX_INT_REG \
&& (REGNO) <= LAST_REX_INT_REG) \
! || ((unsigned) reg_renumber[REGNO] >= FIRST_REX_INT_REG \
! && (unsigned) reg_renumber[REGNO] <= LAST_REX_INT_REG) \
! || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
!
! #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
! #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
and check its validity for a certain class.
--- 1876,1889 ----
|| (REGNO) == FRAME_POINTER_REGNUM \
|| (REGNO >= FIRST_REX_INT_REG \
&& (REGNO) <= LAST_REX_INT_REG) \
! || ((unsigned) reg_renumber[(REGNO)] >= FIRST_REX_INT_REG \
! && (unsigned) reg_renumber[(REGNO)] <= LAST_REX_INT_REG) \
! || (unsigned) reg_renumber[(REGNO)] <= STACK_POINTER_REGNUM)
!
! #define REGNO_OK_FOR_SIREG_P(REGNO) \
! ((REGNO) == 4 || reg_renumber[(REGNO)] == 4)
! #define REGNO_OK_FOR_DIREG_P(REGNO) \
! ((REGNO) == 5 || reg_renumber[(REGNO)] == 5)
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
and check its validity for a certain class.
*************** typedef struct ix86_args {
*** 1899,1910 ****
#define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
#ifndef REG_OK_STRICT
! #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
! #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
#else
! #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
! #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
#endif
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
--- 1919,1930 ----
#define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
#ifndef REG_OK_STRICT
! #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)
! #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P (X)
#else
! #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P (X)
! #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
#endif
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
*************** typedef struct ix86_args {
*** 1932,1948 ****
#ifdef REG_OK_STRICT
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
! { \
! if (legitimate_address_p (MODE, X, 1)) \
goto ADDR; \
! }
#else
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
! { \
! if (legitimate_address_p (MODE, X, 0)) \
goto ADDR; \
! }
#endif
--- 1952,1968 ----
#ifdef REG_OK_STRICT
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
! do { \
! if (legitimate_address_p ((MODE), (X), 1)) \
goto ADDR; \
! } while (0)
#else
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
! do { \
! if (legitimate_address_p ((MODE), (X), 0)) \
goto ADDR; \
! } while (0)
#endif
*************** typedef struct ix86_args {
*** 1955,1961 ****
The typical use of this macro is to handle addresses containing
a label_ref or symbol_ref within an UNSPEC. */
! #define FIND_BASE_TERM(X) ix86_find_base_term (x)
/* Try machine-dependent ways of modifying an illegitimate address
to be legitimate. If we find one, return the new, valid address.
--- 1975,1981 ----
The typical use of this macro is to handle addresses containing
a label_ref or symbol_ref within an UNSPEC. */
! #define FIND_BASE_TERM(X) ix86_find_base_term (X)
/* Try machine-dependent ways of modifying an illegitimate address
to be legitimate. If we find one, return the new, valid address.
*************** typedef struct ix86_args {
*** 1979,1991 ****
See comments by legitimize_pic_address in i386.c for details. */
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
! { \
! (X) = legitimize_address (X, OLDX, MODE); \
! if (memory_address_p (MODE, X)) \
goto WIN; \
! }
! #define REWRITE_ADDRESS(x) rewrite_address(x)
/* Nonzero if the constant value X is a legitimate general operand
when generating PIC code. It is given that flag_pic is on and
--- 1999,2011 ----
See comments by legitimize_pic_address in i386.c for details. */
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
! do { \
! (X) = legitimize_address ((X), (OLDX), (MODE)); \
! if (memory_address_p ((MODE), (X))) \
goto WIN; \
! } while (0)
! #define REWRITE_ADDRESS(X) rewrite_address (X)
/* Nonzero if the constant value X is a legitimate general operand
when generating PIC code. It is given that flag_pic is on and
*************** typedef struct ix86_args {
*** 1996,2011 ****
|| legitimate_pic_address_disp_p (X))
#define SYMBOLIC_CONST(X) \
! (GET_CODE (X) == SYMBOL_REF \
! || GET_CODE (X) == LABEL_REF \
! || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
/* Go to LABEL if ADDR (a legitimate address expression)
has an effect that depends on the machine mode it is used for.
On the 80386, only postdecrement and postincrement address depend thus
(the amount of decrement or increment being the length of the operand). */
! #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
! if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
/* Codes for all the SSE/MMX builtins. */
enum ix86_builtins
--- 2016,2035 ----
|| legitimate_pic_address_disp_p (X))
#define SYMBOLIC_CONST(X) \
! (GET_CODE (X) == SYMBOL_REF \
! || GET_CODE (X) == LABEL_REF \
! || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
/* Go to LABEL if ADDR (a legitimate address expression)
has an effect that depends on the machine mode it is used for.
On the 80386, only postdecrement and postincrement address depend thus
(the amount of decrement or increment being the length of the operand). */
! #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
! do { \
! if (GET_CODE (ADDR) == POST_INC \
! || GET_CODE (ADDR) == POST_DEC) \
! goto LABEL; \
! } while (0)
/* Codes for all the SSE/MMX builtins. */
enum ix86_builtins
*************** enum ix86_builtins
*** 2248,2255 ****
so that we may access it directly in the GOT. */
#define ENCODE_SECTION_INFO(DECL) \
! do \
! { \
if (flag_pic) \
{ \
rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
--- 2272,2278 ----
so that we may access it directly in the GOT. */
#define ENCODE_SECTION_INFO(DECL) \
! do { \
if (flag_pic) \
{ \
rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
*************** do \
*** 2270,2277 ****
|| ! TREE_PUBLIC (DECL)); \
} \
} \
! } \
! while (0)
/* The `FINALIZE_PIC' macro serves as a hook to emit these special
codes once the function is being compiled into assembly code, but
--- 2293,2299 ----
|| ! TREE_PUBLIC (DECL)); \
} \
} \
! } while (0)
/* The `FINALIZE_PIC' macro serves as a hook to emit these special
codes once the function is being compiled into assembly code, but
*************** while (0)
*** 2280,2291 ****
prologues being included in functions which used inline functions
and were compiled to assembly language.) */
! #define FINALIZE_PIC \
! do \
! { \
! current_function_uses_pic_offset_table |= current_function_profile; \
! } \
! while (0)
/* Max number of args passed in registers. If this is more than 3, we will
--- 2302,2309 ----
prologues being included in functions which used inline functions
and were compiled to assembly language.) */
! #define FINALIZE_PIC \
! (current_function_uses_pic_offset_table |= current_function_profile)
/* Max number of args passed in registers. If this is more than 3, we will
*************** while (0)
*** 2373,2381 ****
quantities to SImode. The choice depends on target type. */
#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
if (((MODE) == HImode && TARGET_PROMOTE_HI_REGS) \
|| ((MODE) == QImode && TARGET_PROMOTE_QI_REGS)) \
! (MODE) = SImode;
/* Specify the machine mode that pointers have.
After generation of rtl, the compiler makes no further distinction
--- 2391,2401 ----
quantities to SImode. The choice depends on target type. */
#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
+ do { \
if (((MODE) == HImode && TARGET_PROMOTE_HI_REGS) \
|| ((MODE) == QImode && TARGET_PROMOTE_QI_REGS)) \
! (MODE) = SImode; \
! } while (0)
/* Specify the machine mode that pointers have.
After generation of rtl, the compiler makes no further distinction
*************** while (0)
*** 2400,2406 ****
CODE is the expression code--redundant, since it can be obtained
with `GET_CODE (X)'. */
! #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
case CONST_INT: \
case CONST: \
case LABEL_REF: \
--- 2420,2426 ----
CODE is the expression code--redundant, since it can be obtained
with `GET_CODE (X)'. */
! #define CONST_COSTS(RTX, CODE, OUTER_CODE) \
case CONST_INT: \
case CONST: \
case LABEL_REF: \
*************** while (0)
*** 2437,2443 ****
This macro is optional; do not define it if the default cost
assumptions are adequate for the target machine. */
! #define RTX_COSTS(X,CODE,OUTER_CODE) \
case ZERO_EXTEND: \
/* The zero extensions is often completely free on x86_64, so make \
it as cheap as possible. */ \
--- 2457,2463 ----
This macro is optional; do not define it if the default cost
assumptions are adequate for the target machine. */
! #define RTX_COSTS(X, CODE, OUTER_CODE) \
case ZERO_EXTEND: \
/* The zero extensions is often completely free on x86_64, so make \
it as cheap as possible. */ \
*************** while (0)
*** 2536,2544 ****
if (val == 2 || val == 4 || val == 8) \
{ \
return (COSTS_N_INSNS (ix86_cost->lea) \
! + rtx_cost (XEXP (XEXP (X, 0), 1), OUTER_CODE) \
! + rtx_cost (XEXP (XEXP (XEXP (X, 0), 0), 0), OUTER_CODE) \
! + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
} \
} \
else if (GET_CODE (XEXP (X, 0)) == MULT \
--- 2556,2566 ----
if (val == 2 || val == 4 || val == 8) \
{ \
return (COSTS_N_INSNS (ix86_cost->lea) \
! + rtx_cost (XEXP (XEXP (X, 0), 1), \
! (OUTER_CODE)) \
! + rtx_cost (XEXP (XEXP (XEXP (X, 0), 0), 0), \
! (OUTER_CODE)) \
! + rtx_cost (XEXP (X, 1), (OUTER_CODE))); \
} \
} \
else if (GET_CODE (XEXP (X, 0)) == MULT \
*************** while (0)
*** 2548,2563 ****
if (val == 2 || val == 4 || val == 8) \
{ \
return (COSTS_N_INSNS (ix86_cost->lea) \
! + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
! + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
} \
} \
else if (GET_CODE (XEXP (X, 0)) == PLUS) \
{ \
return (COSTS_N_INSNS (ix86_cost->lea) \
! + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
! + rtx_cost (XEXP (XEXP (X, 0), 1), OUTER_CODE) \
! + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
} \
} \
\
--- 2570,2586 ----
if (val == 2 || val == 4 || val == 8) \
{ \
return (COSTS_N_INSNS (ix86_cost->lea) \
! + rtx_cost (XEXP (XEXP (X, 0), 0), \
! (OUTER_CODE)) \
! + rtx_cost (XEXP (X, 1), (OUTER_CODE))); \
} \
} \
else if (GET_CODE (XEXP (X, 0)) == PLUS) \
{ \
return (COSTS_N_INSNS (ix86_cost->lea) \
! + rtx_cost (XEXP (XEXP (X, 0), 0), (OUTER_CODE)) \
! + rtx_cost (XEXP (XEXP (X, 0), 1), (OUTER_CODE)) \
! + rtx_cost (XEXP (X, 1), (OUTER_CODE))); \
} \
} \
\
*************** while (0)
*** 2568,2576 ****
case MINUS: \
if (!TARGET_64BIT && GET_MODE (X) == DImode) \
return (COSTS_N_INSNS (ix86_cost->add) * 2 \
! + (rtx_cost (XEXP (X, 0), OUTER_CODE) \
<< (GET_MODE (XEXP (X, 0)) != DImode)) \
! + (rtx_cost (XEXP (X, 1), OUTER_CODE) \
<< (GET_MODE (XEXP (X, 1)) != DImode))); \
\
/* fall through */ \
--- 2591,2599 ----
case MINUS: \
if (!TARGET_64BIT && GET_MODE (X) == DImode) \
return (COSTS_N_INSNS (ix86_cost->add) * 2 \
! + (rtx_cost (XEXP (X, 0), (OUTER_CODE)) \
<< (GET_MODE (XEXP (X, 0)) != DImode)) \
! + (rtx_cost (XEXP (X, 1), (OUTER_CODE)) \
<< (GET_MODE (XEXP (X, 1)) != DImode))); \
\
/* fall through */ \
*************** while (0)
*** 2643,2649 ****
general registers. */
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
! ix86_register_move_cost (MODE, CLASS1, CLASS2)
/* A C expression for the cost of moving data of mode M between a
register and memory. A value of 2 is the default; this cost is
--- 2666,2672 ----
general registers. */
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
! ix86_register_move_cost ((MODE), (CLASS1), (CLASS2))
/* A C expression for the cost of moving data of mode M between a
register and memory. A value of 2 is the default; this cost is
*************** while (0)
*** 2653,2660 ****
between two registers, you should define this macro to express the
relative cost. */
! #define MEMORY_MOVE_COST(MODE,CLASS,IN) \
! ix86_memory_move_cost (MODE, CLASS, IN)
/* A C expression for the cost of a branch instruction. A value of 1
is the default; other values are interpreted relative to that. */
--- 2676,2683 ----
between two registers, you should define this macro to express the
relative cost. */
! #define MEMORY_MOVE_COST(MODE, CLASS, IN) \
! ix86_memory_move_cost ((MODE), (CLASS), (IN))
/* A C expression for the cost of a branch instruction. A value of 1
is the default; other values are interpreted relative to that. */
*************** while (0)
*** 2747,2759 ****
Add CCZ to indicate that only the Zero flag is valid. */
! #define EXTRA_CC_MODES \
! CC(CCGCmode, "CCGC") \
! CC(CCGOCmode, "CCGOC") \
! CC(CCNOmode, "CCNO") \
! CC(CCZmode, "CCZ") \
! CC(CCFPmode, "CCFP") \
! CC(CCFPUmode, "CCFPU")
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
return the mode to be used for the comparison.
--- 2770,2782 ----
Add CCZ to indicate that only the Zero flag is valid. */
! #define EXTRA_CC_MODES \
! CC (CCGCmode, "CCGC") \
! CC (CCGOCmode, "CCGOC") \
! CC (CCNOmode, "CCNO") \
! CC (CCZmode, "CCZ") \
! CC (CCFPmode, "CCFP") \
! CC (CCFPUmode, "CCFPU")
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
return the mode to be used for the comparison.
*************** while (0)
*** 2764,2770 ****
For integer comparisons against zero, reduce to CCNOmode or CCZmode if
possible, to allow for more combinations. */
! #define SELECT_CC_MODE(OP,X,Y) ix86_cc_mode (OP, X, Y)
/* Return non-zero if MODE implies a floating point inequality can be
reversed. */
--- 2787,2793 ----
For integer comparisons against zero, reduce to CCNOmode or CCZmode if
possible, to allow for more combinations. */
! #define SELECT_CC_MODE(OP, X, Y) ix86_cc_mode ((OP), (X), (Y))
/* Return non-zero if MODE implies a floating point inequality can be
reversed. */
*************** number as al, and ax.
*** 2830,2837 ****
/* How to renumber registers for dbx and gdb. */
! #define DBX_REGISTER_NUMBER(n) \
! (TARGET_64BIT ? dbx64_register_map[n] : dbx_register_map[n])
extern int const dbx_register_map[FIRST_PSEUDO_REGISTER];
extern int const dbx64_register_map[FIRST_PSEUDO_REGISTER];
--- 2853,2860 ----
/* How to renumber registers for dbx and gdb. */
! #define DBX_REGISTER_NUMBER(N) \
! (TARGET_64BIT ? dbx64_register_map[(N)] : dbx_register_map[(N)])
extern int const dbx_register_map[FIRST_PSEUDO_REGISTER];
extern int const dbx64_register_map[FIRST_PSEUDO_REGISTER];
*************** extern int const svr4_dbx_register_map[F
*** 2866,2881 ****
After all, the relocation needed is the same as for the call insn.
Whether or not a particular assembler allows us to enter such, I
guess we'll have to see. */
! #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
(flag_pic \
! ? (GLOBAL ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4\
: DW_EH_PE_absptr)
/* This is how to output the definition of a user-level label named NAME,
such as the label on a static function or variable NAME. */
! #define ASM_OUTPUT_LABEL(FILE,NAME) \
! (assemble_name (FILE, NAME), fputs (":\n", FILE))
/* Store in OUTPUT a string (made with alloca) containing
an assembler-name for a local static variable named NAME.
--- 2889,2904 ----
After all, the relocation needed is the same as for the call insn.
Whether or not a particular assembler allows us to enter such, I
guess we'll have to see. */
! #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
(flag_pic \
! ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4\
: DW_EH_PE_absptr)
/* This is how to output the definition of a user-level label named NAME,
such as the label on a static function or variable NAME. */
! #define ASM_OUTPUT_LABEL(FILE, NAME) \
! (assemble_name ((FILE), (NAME)), fputs (":\n", (FILE)))
/* Store in OUTPUT a string (made with alloca) containing
an assembler-name for a local static variable named NAME.
*************** extern int const svr4_dbx_register_map[F
*** 2888,2911 ****
/* This is how to output an insn to push a register on the stack.
It need not be very fast code. */
! #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
! asm_fprintf (FILE, "\tpush{l}\t%%e%s\n", reg_names[REGNO])
/* This is how to output an insn to pop a register from the stack.
It need not be very fast code. */
! #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
! asm_fprintf (FILE, "\tpop{l}\t%%e%s\n", reg_names[REGNO])
/* This is how to output an element of a case-vector that is absolute. */
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
! ix86_output_addr_vec_elt (FILE, VALUE)
/* This is how to output an element of a case-vector that is relative. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
! ix86_output_addr_diff_elt (FILE, VALUE, REL)
/* Under some conditions we need jump tables in the text section, because
the assembler cannot handle label differences between sections. */
--- 2911,2934 ----
/* This is how to output an insn to push a register on the stack.
It need not be very fast code. */
! #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
! asm_fprintf ((FILE), "\tpush{l}\t%%e%s\n", reg_names[(REGNO)])
/* This is how to output an insn to pop a register from the stack.
It need not be very fast code. */
! #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
! asm_fprintf ((FILE), "\tpop{l}\t%%e%s\n", reg_names[(REGNO)])
/* This is how to output an element of a case-vector that is absolute. */
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
! ix86_output_addr_vec_elt ((FILE), (VALUE))
/* This is how to output an element of a case-vector that is relative. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
! ix86_output_addr_diff_elt ((FILE), (VALUE), (REL))
/* Under some conditions we need jump tables in the text section, because
the assembler cannot handle label differences between sections. */
*************** extern int const svr4_dbx_register_map[F
*** 2916,2935 ****
/* A C statement that outputs an address constant appropriate to
for DWARF debugging. */
! #define ASM_OUTPUT_DWARF_ADDR_CONST(FILE,X) \
! i386_dwarf_output_addr_const((FILE),(X))
/* Either simplify a location expression, or return the original. */
#define ASM_SIMPLIFY_DWARF_ADDR(X) \
! i386_simplify_dwarf_addr(X)
/* Print operand X (an rtx) in assembler syntax to file FILE.
CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
Effect of various CODE letters is described in i386.c near
print_operand function. */
! #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
((CODE) == '*' || (CODE) == '+')
/* Print the name of a register based on its machine mode and number.
--- 2939,2958 ----
/* A C statement that outputs an address constant appropriate to
for DWARF debugging. */
! #define ASM_OUTPUT_DWARF_ADDR_CONST(FILE, X) \
! i386_dwarf_output_addr_const ((FILE), (X))
/* Either simplify a location expression, or return the original. */
#define ASM_SIMPLIFY_DWARF_ADDR(X) \
! i386_simplify_dwarf_addr (X)
/* Print operand X (an rtx) in assembler syntax to file FILE.
CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
Effect of various CODE letters is described in i386.c near
print_operand function. */
! #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
((CODE) == '*' || (CODE) == '+')
/* Print the name of a register based on its machine mode and number.
*************** extern int const svr4_dbx_register_map[F
*** 2941,2953 ****
If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
#define PRINT_REG(X, CODE, FILE) \
! print_reg (X, CODE, FILE)
#define PRINT_OPERAND(FILE, X, CODE) \
! print_operand (FILE, X, CODE)
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
! print_operand_address (FILE, ADDR)
/* Print the name of a register for based on its machine mode and number.
This macro is used to print debugging output.
--- 2964,2976 ----
If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
#define PRINT_REG(X, CODE, FILE) \
! print_reg ((X), (CODE), (FILE))
#define PRINT_OPERAND(FILE, X, CODE) \
! print_operand ((FILE), (X), (CODE))
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
! print_operand_address ((FILE), (ADDR))
/* Print the name of a register for based on its machine mode and number.
This macro is used to print debugging output.
*************** extern int const svr4_dbx_register_map[F
*** 2957,2996 ****
#define DEBUG_PRINT_REG(X, CODE, FILE) \
do { static const char * const hi_name[] = HI_REGISTER_NAMES; \
static const char * const qi_name[] = QI_REGISTER_NAMES; \
! fprintf (FILE, "%d ", REGNO (X)); \
if (REGNO (X) == FLAGS_REG) \
! { fputs ("flags", FILE); break; } \
if (REGNO (X) == DIRFLAG_REG) \
! { fputs ("dirflag", FILE); break; } \
if (REGNO (X) == FPSR_REG) \
! { fputs ("fpsr", FILE); break; } \
if (REGNO (X) == ARG_POINTER_REGNUM) \
! { fputs ("argp", FILE); break; } \
if (REGNO (X) == FRAME_POINTER_REGNUM) \
! { fputs ("frame", FILE); break; } \
if (STACK_TOP_P (X)) \
! { fputs ("st(0)", FILE); break; } \
if (FP_REG_P (X)) \
! { fputs (hi_name[REGNO(X)], FILE); break; } \
if (REX_INT_REG_P (X)) \
{ \
switch (GET_MODE_SIZE (GET_MODE (X))) \
{ \
default: \
case 8: \
! fprintf (FILE, "r%i", REGNO (X) \
- FIRST_REX_INT_REG + 8); \
break; \
case 4: \
! fprintf (FILE, "r%id", REGNO (X) \
- FIRST_REX_INT_REG + 8); \
break; \
case 2: \
! fprintf (FILE, "r%iw", REGNO (X) \
- FIRST_REX_INT_REG + 8); \
break; \
case 1: \
! fprintf (FILE, "r%ib", REGNO (X) \
- FIRST_REX_INT_REG + 8); \
break; \
} \
--- 2980,3019 ----
#define DEBUG_PRINT_REG(X, CODE, FILE) \
do { static const char * const hi_name[] = HI_REGISTER_NAMES; \
static const char * const qi_name[] = QI_REGISTER_NAMES; \
! fprintf ((FILE), "%d ", REGNO (X)); \
if (REGNO (X) == FLAGS_REG) \
! { fputs ("flags", (FILE)); break; } \
if (REGNO (X) == DIRFLAG_REG) \
! { fputs ("dirflag", (FILE)); break; } \
if (REGNO (X) == FPSR_REG) \
! { fputs ("fpsr", (FILE)); break; } \
if (REGNO (X) == ARG_POINTER_REGNUM) \
! { fputs ("argp", (FILE)); break; } \
if (REGNO (X) == FRAME_POINTER_REGNUM) \
! { fputs ("frame", (FILE)); break; } \
if (STACK_TOP_P (X)) \
! { fputs ("st(0)", (FILE)); break; } \
if (FP_REG_P (X)) \
! { fputs (hi_name[REGNO(X)], (FILE)); break; } \
if (REX_INT_REG_P (X)) \
{ \
switch (GET_MODE_SIZE (GET_MODE (X))) \
{ \
default: \
case 8: \
! fprintf ((FILE), "r%i", REGNO (X) \
- FIRST_REX_INT_REG + 8); \
break; \
case 4: \
! fprintf ((FILE), "r%id", REGNO (X) \
- FIRST_REX_INT_REG + 8); \
break; \
case 2: \
! fprintf ((FILE), "r%iw", REGNO (X) \
- FIRST_REX_INT_REG + 8); \
break; \
case 1: \
! fprintf ((FILE), "r%ib", REGNO (X) \
- FIRST_REX_INT_REG + 8); \
break; \
} \
*************** extern int const svr4_dbx_register_map[F
*** 2999,3014 ****
switch (GET_MODE_SIZE (GET_MODE (X))) \
{ \
case 8: \
! fputs ("r", FILE); \
! fputs (hi_name[REGNO (X)], FILE); \
break; \
default: \
! fputs ("e", FILE); \
case 2: \
! fputs (hi_name[REGNO (X)], FILE); \
break; \
case 1: \
! fputs (qi_name[REGNO (X)], FILE); \
break; \
} \
} while (0)
--- 3022,3037 ----
switch (GET_MODE_SIZE (GET_MODE (X))) \
{ \
case 8: \
! fputs ("r", (FILE)); \
! fputs (hi_name[REGNO (X)], (FILE)); \
break; \
default: \
! fputs ("e", (FILE)); \
case 2: \
! fputs (hi_name[REGNO (X)], (FILE)); \
break; \
case 1: \
! fputs (qi_name[REGNO (X)], (FILE)); \
break; \
} \
} while (0)
*************** extern int const svr4_dbx_register_map[F
*** 3018,3024 ****
#define ASM_OPERAND_LETTER '#'
#define RET return ""
! #define AT_SP(mode) (gen_rtx_MEM ((mode), stack_pointer_rtx))
/* Define the codes that are matched by predicates in i386.c. */
--- 3041,3047 ----
#define ASM_OPERAND_LETTER '#'
#define RET return ""
! #define AT_SP(MODE) (gen_rtx_MEM ((MODE), stack_pointer_rtx))
/* Define the codes that are matched by predicates in i386.c. */
*************** extern int ix86_regparm; /* ix86_regpa
*** 3137,3144 ****
extern int ix86_preferred_stack_boundary; /* preferred stack boundary alignment in bits */
extern int ix86_branch_cost; /* values 1-5: see jump.c */
extern enum reg_class const regclass_map[FIRST_PSEUDO_REGISTER]; /* smalled class containing REGNO */
! extern struct rtx_def *ix86_compare_op0; /* operand 0 for comparisons */
! extern struct rtx_def *ix86_compare_op1; /* operand 1 for comparisons */
/* To properly truncate FP values into integers, we need to set i387 control
word. We can't emit proper mode switching code before reload, as spills
--- 3160,3167 ----
extern int ix86_preferred_stack_boundary; /* preferred stack boundary alignment in bits */
extern int ix86_branch_cost; /* values 1-5: see jump.c */
extern enum reg_class const regclass_map[FIRST_PSEUDO_REGISTER]; /* smalled class containing REGNO */
! extern rtx ix86_compare_op0; /* operand 0 for comparisons */
! extern rtx ix86_compare_op1; /* operand 1 for comparisons */
/* To properly truncate FP values into integers, we need to set i387 control
word. We can't emit proper mode switching code before reload, as spills
*************** enum fp_cw_mode {FP_CW_STORED, FP_CW_UNI
*** 3190,3203 ****
/* This macro specifies the order in which modes for ENTITY are
processed. 0 is the highest priority. */
! #define MODE_PRIORITY_TO_MODE(ENTITY, N) N
/* Generate one or more insns to set ENTITY to MODE. HARD_REG_LIVE
is the set of hard registers live at the point where the insn(s)
are to be inserted. */
#define EMIT_MODE_SET(ENTITY, MODE, HARD_REGS_LIVE) \
! (MODE == FP_CW_STORED \
? emit_i387_cw_initialization (assign_386_stack_local (HImode, 1), \
assign_386_stack_local (HImode, 2)), 0\
: 0)
--- 3213,3226 ----
/* This macro specifies the order in which modes for ENTITY are
processed. 0 is the highest priority. */
! #define MODE_PRIORITY_TO_MODE(ENTITY, N) (N)
/* Generate one or more insns to set ENTITY to MODE. HARD_REG_LIVE
is the set of hard registers live at the point where the insn(s)
are to be inserted. */
#define EMIT_MODE_SET(ENTITY, MODE, HARD_REGS_LIVE) \
! ((MODE) == FP_CW_STORED \
? emit_i387_cw_initialization (assign_386_stack_local (HImode, 1), \
assign_386_stack_local (HImode, 2)), 0\
: 0)
*************** enum fp_cw_mode {FP_CW_STORED, FP_CW_UNI
*** 3208,3215 ****
??? Maybe Pentium chips benefits from renaming, someone can try... */
! #define HARD_REGNO_RENAME_OK(src,target) \
! ((src) < FIRST_STACK_REG || (src) > LAST_STACK_REG)
/*
--- 3231,3238 ----
??? Maybe Pentium chips benefits from renaming, someone can try... */
! #define HARD_REGNO_RENAME_OK(SRC, TARGET) \
! ((SRC) < FIRST_STACK_REG || (SRC) > LAST_STACK_REG)
/*