Re: ix86 prefetch support updated (still partly perlimitary?)

[Janis Johnson <janis187 at us dot ibm dot com>]

On Thu, Dec 13, 2001 at 10:00:28PM +0100, Jan Hubicka wrote:
> 
> Hi,
> This adds the prefetch support at the top of configury bits.  It appears
> to work, but I guess I need to test it more seriously tommorow.
> 
> Bootstrapped/regtested i386
> 
> Thu Dec 13 21:57:13 CET 2001  Janis Jognson <janis187@us.ibm.com>
> 			      Jan Hubicka  <jh@suse.cz>
> 
> 	* config/i386/i386.h (struct processor_costs): Add new members
> 	  prefetch_block and simultaneous_prefetches.
> 	  (PREFETCH_BLOCK, SIMULTANEOUS_PREFETCHES): New.
> 	* config/i386/i386.c (processor_costs structs): Add values for
> 	  prefetch_block and simultaneous_prefetches.
> 	* config/i386/i386.md (unspec values): Remove values for prefetch
> 	  operations, which now use the PREFETCH rtx code.
> 	  (prefetch_sse, prefetch_3dnow, prefetchw): Combine to use new
> 	  unified prefetch support.

Honza, I found a couple of little problems with this, including that it
wasn't generating prefetch instructions for -march=pentium[34].  The
changes to i386.[ch] here apply to your changes and I assume you can
incorporate them into your patch if they look OK to you.  There's a new
warning that I'll let you handle:

../../gcc-mainline/gcc/config/i386/i386.c: In function `override_options':
../../gcc-mainline/gcc/config/i386/i386.c:833: warning: traditional C rejects automatic aggregate initialization

for this line:

   const char *cpu_names[] = TARGET_CPU_DEFAULT_NAMES;

The tests below are updates of the ones I sent in before, and should
verify that the right set of prefetch instructions, or none at all, is
being generated for each -march or -mcpu option.  As they are now,
there's no way to tell which option caused a failure, but I'll look into
that some more.  I also added tests for the existing
 __builtin_ia32_prefetch* functions to make sure they don't break.

With these changes, your patch bootstraps on i686-pc-linux-gnu
(Pentium III).  There are a few test failures that I think are
harmless, but I don't have time to check into them tonight; you said
you'll be doing more testing anyway.

Janis

	* config/i386/i386.h
	* config/i386/i386.c

	* testsuite/gcc.misc-tests/i386-prefetch.exp: New.
	* testsuite/gcc.misc-tests/i386-pf-3dnow-1.c: New.
	* testsuite/gcc.misc-tests/i386-pf-3dnow-2.c: New.
	* testsuite/gcc.misc-tests/i386-pf-athlon-1.c: New.
	* testsuite/gcc.misc-tests/i386-pf-athlon-2.c: New.
	* testsuite/gcc.misc-tests/i386-pf-none-1.c: New.
	* testsuite/gcc.misc-tests/i386-pf-sse-1.c: New.
	* testsuite/gcc.misc-tests/i386-pf-sse-2.c: New.

--- config/i386/i386.h.honza	Thu Dec 13 19:56:22 2001
+++ config/i386/i386.h	Thu Dec 13 19:59:23 2001
@@ -572,7 +572,7 @@ extern int ix86_arch;
 %{m386|mcpu=i386:-D__tune_i386__ }\
 %{m486|mcpu=i486:-D__tune_i486__ }\
 %{mpentium|mcpu=pentium|mcpu=i586|mcpu=pentium-mmx:-D__tune_i586__ -D__tune_pentium__ }\
-%{mpentiumpro|mcpu=pentiumpro|mcpu=i686|cpu=pentium2|cpu=pentium3:-D__tune_i686__\
+%{mpentiumpro|mcpu=pentiumpro|mcpu=i686|cpu=pentium2|cpu=pentium3:-D__tune_i686__ \
 -D__tune_pentiumpro__ }\
 %{mcpu=k6|mcpu=k6-2|mcpu=k6-3:-D__tune_k6__ }\
 %{mcpu=athlon|mcpu=athlon-tbird|mcpu=athlon-4|mcpu=athlon-xp|mcpu=athlon-mp:\
--- config/i386/i386.c.honza	Thu Dec 13 19:56:17 2001
+++ config/i386/i386.c	Thu Dec 13 19:59:16 2001
@@ -392,6 +392,7 @@ const int x86_accumulate_outgoing_args =
 const int x86_prologue_using_move = m_ATHLON | m_PENT4 | m_PPRO;
 const int x86_epilogue_using_move = m_ATHLON | m_PENT4 | m_PPRO;
 const int x86_decompose_lea = m_PENT4;
+int x86_prefetch_sse;
 
 /* In case the avreage insn count for single function invocation is
    lower than this constant, emit fast (but longer) prologue and
@@ -881,7 +882,7 @@ override_options ()
   if (!ix86_arch_string)
     {
       if (ix86_cpu_string)
-	ix86_arch_string = ix86_arch_string)
+	ix86_arch_string = ix86_cpu_string;
       else
 	ix86_arch_string = TARGET_64BIT ? "athlon-4" : "i386";
     }
@@ -941,6 +942,8 @@ override_options ()
 	if (processor_alias_table[i].flags & PTA_SSE2
 	    && !(target_flags & MASK_SSE2_SET))
 	  target_flags |= MASK_SSE2;
+	if (processor_alias_table[i].flags & PTA_PREFETCH_SSE)
+	  x86_prefetch_sse = true;
 	break;
       }
 
--- /dev/null	Tue May 23 09:27:54 2000
+++ i386-prefetch.exp	Thu Dec 13 18:35:06 2001
@@ -0,0 +1,79 @@
+#   Copyright (C) 2001 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  
+
+# Test that the correct data prefetch instructions (SSE or 3DNow! variant,
+# or none) are used for various i386 cpu-type and instruction set
+# extension options.
+
+set PREFETCH_NONE [list \
+	{ -mcpu=i386 } \
+	{ -mcpu=i486 } \
+	{ -mcpu=i586 } \
+	{ -mcpu=i686 } \
+	{ -mcpu=pentium2 } \
+	{ -mcpu=k6 } \
+	{ -march=i386 } \
+	{ -march=i486 } \
+	{ -march=i586 } \
+	{ -march=i686 } \
+	{ -march=pentium2 } \
+	{ -march=k6 } ]
+
+set PREFETCH_SSE [list \
+	{ -mcpu=pentium3 } \
+	{ -mcpu=pentium4 } \
+	{ -march=pentium3 } \
+	{ -march=pentium4 } ]
+
+set PREFETCH_3DNOW [list \
+	{ -mcpu=k6-2 } \
+	{ -mcpu=k6-3 } \
+	{ -march=k6-2 } \
+	{ -march=k6-3 } ]
+
+set PREFETCH_ATHLON [list \
+	{ -mcpu=athlon } \
+	{ -mcpu=athlon-4 } \
+	{ -march=athlon } \
+	{ -march=athlon-4 } ]
+
+if $tracelevel then {
+    strace $tracelevel
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# Initialize harness.
+dg-init
+
+set torture_with_loops $PREFETCH_NONE
+set torture_without_loops $PREFETCH_NONE
+gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/i386-pf-none-*.c]] ""
+
+set torture_with_loops $PREFETCH_SSE
+set torture_without_loops $PREFETCH_SSE
+gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/i386-pf-sse-*.c]] ""
+
+set torture_with_loops $PREFETCH_3DNOW
+set torture_without_loops $PREFETCH_3DNOW
+gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/i386-pf-3dnow-*.c]] ""
+
+set torture_with_loops $PREFETCH_ATHLON
+set torture_without_loops $PREFETCH_ATHLON
+gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/i386-pf-athlon-*.c]] ""
+
+dg-finish
--- /dev/null	Tue May 23 09:27:54 2000
+++ i386-pf-3dnow-1.c	Thu Dec 13 14:05:03 2001
@@ -0,0 +1,29 @@
+/* Test that the correct data prefetch instructions are generated for i386
+   variants that use 3DNow! prefetch instructions.  */
+
+/* { dg-do compile { target i?86-*-* } } */
+
+char *msg = "howdy there";
+
+void foo (char *p)
+{
+  __builtin_prefetch (p, 0, 0);
+  __builtin_prefetch (p, 0, 1);
+  __builtin_prefetch (p, 0, 2);
+  __builtin_prefetch (p, 0, 3);
+  __builtin_prefetch (p, 1, 0);
+  __builtin_prefetch (p, 1, 1);
+  __builtin_prefetch (p, 1, 2);
+  __builtin_prefetch (p, 1, 3);
+}
+
+int main ()
+{
+  foo (msg);
+  exit (0);
+}
+
+/* { dg-final { scan-assembler "prefetch" } } */
+/* { dg-final { scan-assembler "prefetchw" } } */
+/* { dg-final { scan-assembler-not "prefetchnta" } } */
+/* { dg-final { scan-assembler-not "prefetcht" } } */
--- /dev/null	Tue May 23 09:27:54 2000
+++ i386-pf-3dnow-2.c	Thu Dec 13 18:48:50 2001
@@ -0,0 +1,24 @@
+/* Test that the correct data prefetch instructions are generated for
+   __builtin_ia32_prefetch_3dnow and __builtin_ia32_prefetchw on x86
+   variants that support those functions.  */
+
+/* { dg-do compile { target i?86-*-* } } */
+
+char *msg = "howdy there";
+
+void foo (char *p)
+{
+  __builtin_ia32_prefetch_3dnow (p);
+  __builtin_ia32_prefetchw (p);
+}
+
+int main ()
+{
+  foo (msg);
+  exit (0);
+}
+
+/* { dg-final { scan-assembler "prefetch" } } */
+/* { dg-final { scan-assembler "prefetchw" } } */
+/* { dg-final { scan-assembler-not "prefetchnta" } } */
+/* { dg-final { scan-assembler-not "prefetcht" } } */
--- /dev/null	Tue May 23 09:27:54 2000
+++ i386-pf-athlon-1.c	Thu Dec 13 18:35:21 2001
@@ -0,0 +1,29 @@
+/* Test that the correct data prefetch instructions are generated for i386
+   variants that use 3DNow! prefetchw or SSE prefetch instructions with
+   locality hints.  */
+
+/* { dg-do compile { target i?86-*-* } } */
+
+char *msg = "howdy there";
+
+void foo (char *p)
+{
+  __builtin_prefetch (p, 0, 0);
+  __builtin_prefetch (p, 0, 1);
+  __builtin_prefetch (p, 0, 2);
+  __builtin_prefetch (p, 0, 3);
+  __builtin_prefetch (p, 1, 0);
+  __builtin_prefetch (p, 1, 1);
+  __builtin_prefetch (p, 1, 2);
+  __builtin_prefetch (p, 1, 3);
+}
+
+int main ()
+{
+  foo (msg);
+  exit (0);
+}
+
+/* { dg-final { scan-assembler "prefetchw" } } */
+/* { dg-final { scan-assembler "prefetchnta" } } */
+/* { dg-final { scan-assembler "prefetcht" } } */
--- /dev/null	Tue May 23 09:27:54 2000
+++ i386-pf-athlon-2.c	Thu Dec 13 18:49:08 2001
@@ -0,0 +1,24 @@
+/* Test that the correct data prefetch instructions are generated for
+   __builtin_ia32_prefetch_3dnow and __builtin_ia32_prefetchw on x86
+   variants that support those functions.  */
+
+/* { dg-do compile { target i?86-*-* } } */
+
+char *msg = "howdy there";
+
+void foo (char *p)
+{
+  __builtin_ia32_prefetch_3dnow (p);
+  __builtin_ia32_prefetchw (p);
+}
+
+int main ()
+{
+  foo (msg);
+  exit (0);
+}
+
+/* { dg-final { scan-assembler "prefetch" } } */
+/* { dg-final { scan-assembler "prefetchw" } } */
+/* { dg-final { scan-assembler-not "prefetchnta" } } */
+/* { dg-final { scan-assembler-not "prefetcht" } } */
--- /dev/null	Tue May 23 09:27:54 2000
+++ i386-pf-none-1.c	Thu Dec 13 14:05:03 2001
@@ -0,0 +1,26 @@
+/* Test that data prefetch instructions are not generated for i386 variants
+   that do not support those instructions.  */
+
+/* { dg-do compile { target i?86-*-* } } */
+
+char *msg = "howdy there";
+
+void foo (char *p)
+{
+  __builtin_prefetch (p, 0, 0);
+  __builtin_prefetch (p, 0, 1);
+  __builtin_prefetch (p, 0, 2);
+  __builtin_prefetch (p, 0, 3);
+  __builtin_prefetch (p, 1, 0);
+  __builtin_prefetch (p, 1, 1);
+  __builtin_prefetch (p, 1, 2);
+  __builtin_prefetch (p, 1, 3);
+}
+
+int main ()
+{
+  foo (msg);
+  exit (0);
+}
+
+/* { dg-final { scan-assembler-not "fetch" } } */
--- /dev/null	Tue May 23 09:27:54 2000
+++ i386-pf-sse-1.c	Thu Dec 13 14:05:03 2001
@@ -0,0 +1,30 @@
+/* Test that the correct data prefetch instructions are generated for i386
+   variants that use SSE prefetch instructions.  */
+
+/* { dg-do compile { target i?86-*-* } } */
+
+char *msg = "howdy there";
+
+void foo (char *p)
+{
+  __builtin_prefetch (p, 0, 0);
+  __builtin_prefetch (p, 0, 1);
+  __builtin_prefetch (p, 0, 2);
+  __builtin_prefetch (p, 0, 3);
+  __builtin_prefetch (p, 1, 0);
+  __builtin_prefetch (p, 1, 1);
+  __builtin_prefetch (p, 1, 2);
+  __builtin_prefetch (p, 1, 3);
+}
+
+int main ()
+{
+  foo (msg);
+  exit (0);
+}
+
+/* { dg-final { scan-assembler "prefetchnta" } } */
+/* { dg-final { scan-assembler "prefetcht0" } } */
+/* { dg-final { scan-assembler "prefetcht1" } } */
+/* { dg-final { scan-assembler "prefetcht2" } } */
+/* { dg-final { scan-assembler-not "prefetchw" } } */
--- /dev/null	Tue May 23 09:27:54 2000
+++ i386-pf-sse-2.c	Thu Dec 13 18:41:33 2001
@@ -0,0 +1,26 @@
+/* Test that the correct data prefetch instructions are generated for
+   __buildin_ia32_prefetch on x86 variants that support it.  */
+
+/* { dg-do compile { target i?86-*-* } } */
+
+char *msg = "howdy there";
+
+void foo (char *p)
+{
+  __builtin_ia32_prefetch (p, 0);
+  __builtin_ia32_prefetch (p, 1);
+  __builtin_ia32_prefetch (p, 2);
+  __builtin_ia32_prefetch (p, 3);
+}
+
+int main ()
+{
+  foo (msg);
+  exit (0);
+}
+
+/* { dg-final { scan-assembler "prefetchnta" } } */
+/* { dg-final { scan-assembler "prefetcht0" } } */
+/* { dg-final { scan-assembler "prefetcht1" } } */
+/* { dg-final { scan-assembler "prefetcht2" } } */
+/* { dg-final { scan-assembler-not "prefetchw" } } */