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Remove ARM variant of __builtin_prefetch()
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Richard dot Earnshaw at arm dot com
- Date: Sat, 08 Dec 2001 11:19:23 +0000
- Subject: Remove ARM variant of __builtin_prefetch()
- Organization: ARM Ltd.
- Reply-to: Richard dot Earnshaw at arm dot com
Now that the compiler provides a __builtin_prefetch that is a superset of
the ARM variant, the code for expanding it in the back-end is redundant.
Also fixes the md file to use the new PREFETCH RTL construct.
bootstrapped on arm-netbsd
2001-12-08 Richard Earnshaw <rearnsha@arm.com>
* arm.md (VUNSPEC_PREFETCH): Delete constant definition.
(prefetch): Rewrite using PREFETCH RTL primitive.
* arm.h (arm_builtins): Delete ARM_BUILTIN_PREFETCH).
* arm.c (arm_init_builtins): Don't initialize a builtin for
__builtin_prefetch here.
(arm_expand_builtin): Dont expand __builtin_prefetch here.
Index: arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.176
diff -p -r1.176 arm.c
*** arm.c 2001/12/06 13:53:15 1.176
--- arm.c 2001/12/08 10:57:22
*************** arm_init_builtins ()
*** 9151,9161 ****
/* Initialize arm V5 builtins. */
if (arm_arch5)
def_builtin ("__builtin_clz", int_ftype_int, ARM_BUILTIN_CLZ);
-
- /* Initialize arm V5E builtins. */
- if (arm_arch5e)
- def_builtin ("__builtin_prefetch", void_ftype_pchar,
- ARM_BUILTIN_PREFETCH);
}
/* Expand an expression EXP that calls a built-in function,
--- 9446,9451 ----
*************** arm_expand_builtin (exp, target, subtarg
*** 9199,9217 ****
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
target = gen_reg_rtx (tmode);
pat = GEN_FCN (icode) (target, op0);
- if (! pat)
- return 0;
- emit_insn (pat);
- return target;
-
- case ARM_BUILTIN_PREFETCH:
- icode = CODE_FOR_prefetch;
- arg0 = TREE_VALUE (arglist);
- op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
-
- op0 = gen_rtx_MEM (SImode, copy_to_mode_reg (Pmode, op0));
-
- pat = GEN_FCN (icode) (op0);
if (! pat)
return 0;
emit_insn (pat);
--- 9489,9494 ----
Index: arm.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.h,v
retrieving revision 1.124
diff -p -r1.124 arm.h
*** arm.h 2001/12/06 15:18:54 1.124
--- arm.h 2001/12/08 10:57:23
*************** extern int making_const_table;
*** 2907,2913 ****
enum arm_builtins
{
ARM_BUILTIN_CLZ,
- ARM_BUILTIN_PREFETCH,
ARM_BUILTIN_MAX
};
#endif /* ! GCC_ARM_H */
--- 3030,3035 ----
Index: arm.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.md,v
retrieving revision 1.85
diff -p -r1.85 arm.md
*** arm.md 2001/09/12 17:17:53 1.85
--- arm.md 2001/12/08 10:57:23
***************
*** 88,95 ****
; a 32-bit object.
(VUNSPEC_POOL_8 7) ; `pool-entry(8)'. An entry in the constant pool for
; a 64-bit object.
- (VUNSPEC_PREFETCH 8) ; `pld' insn to prefetch a cache line:
- ; operand 0 is the address to fetch.
]
)
--- 89,94 ----
***************
*** 9173,9182 ****
;; V5E instructions.
(define_insn "prefetch"
! [(unspec_volatile
! [(match_operand:SI 0 "offsettable_memory_operand" "o")] VUNSPEC_PREFETCH)]
"TARGET_ARM && arm_arch5e"
! "pld\\t%0")
;; General predication pattern
--- 10008,10018 ----
;; V5E instructions.
(define_insn "prefetch"
! [(prefetch (match_operand:SI 0 "address_operand" "p")
! (match_operand:SI 1 "" "")
! (match_operand:SI 2 "" ""))]
"TARGET_ARM && arm_arch5e"
! "pld\\t[%0]")
;; General predication pattern