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Re: preliminary patch: prefetch support for i386
On Fri, Nov 30, 2001 at 09:18:19PM +0100, Jan Hubicka wrote:
> first of all, thanks for the patch. It is something I really
> wanted to do for long time.
I know, I'm hoping that the existence of a general framework will
inspire you to update your prefetch optimizations for arrays in loops
and perhaps greedy prefetching of addresses in pointers! Please let me
know what your plans are for this and what I can do to help.
> > Any suggestions on how to provide generic data prefetch support in
> > i386.md would be greatly appreciated.
> What do you mean exactly?
[this was at the end of your mail]
Sorry, that wasn't very clear. What I'm really after is knowing if I'm
using the correct approach by supporting one or the other flavor of data
prefetch instructions for i386 targets based on a combination of
cpu-type and extensions. Having additional cpu-types would make it more
clear, but it sounds like there are also some machines that would still
require a combination of cpu-type and an option like -msse. If so, that
complicates getting the right values for SIMULATANEOUS_PREFETCH and
PREFETCH_BLOCK, which currently come from the cost structures, as in
your prefetch proposal from May 2000. I hadn't realized until today
that it doesn't cover targets that only support prefetch with an
extension set like SSE.
I put together some tests to check that the correct (or no) prefetch
instructions are generated for various i386 targets; they are appended
to this message. There's also a need to check that invalid combinations
of cpu-type and extension options aren't allowed, but that's something I
don't know about at all. I know that my lists are not complete, they're
just a start.
> I think the proper sollution is to include the pentium2/pentium3 switches
> now when we can use some of their features. I can bring it soon,
> but as your patch appears to be getting in, I can wait for it to get
> installed.
I'll resubmit the generic and ia64 prefetch patch on Monday after
bootstrapping and testing again, but I'm still quite uncomfortable with
the i386 support patch. I could submit it without the broken
SIMULTANEOUS_PREFETCH and PREFETCH_BLOCK support and you could work from
that, or else you could rework my i386 prefetch patch as part of your
patch to add new cpu-type switches if you decide to do that.
> I remember that the property of SSE prefetch is that it is nop for older
> CPUs, so I guess it should be controlled by -mcpu instead of -march.
It might be best to not generate prefetch instructions for CPUs where
they are nops, but then again if there is a call to __builtin_prefetch
we could assume that the programmer really wants them. Even as nops,
though, they make the code larger without adding anything.
> Also writting the program, how I will get informed about whether the
> prefetch builtin is supported or not.
As things are now, by looking at the generated code. I had thought it
was a feature to silently treat __builtin_prefetch as a nop on targets
that don't have data prefetch support, but perhaps a warning would be
appropriate. There aren't other builtins that are safe to use when not
supported, so I didn't have an example to follow.
Janis
--- gcc/testsuite/gcc.misc-tests/i386-prefetch.exp.orig Fri Nov 30 12:57:19 2001
+++ gcc/testsuite/gcc.misc-tests/i386-prefetch.exp Fri Nov 30 12:56:47 2001
@@ -0,0 +1,58 @@
+# Copyright (C) 2001 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+# Test that the correct data prefetch instructions (SSE or 3DNow! variant,
+# or none) are used for various i386 cpu-type and instruction set
+# extension options.
+
+set PREFETCH_NONE [list \
+ { -march=i386 } \
+ { -march=i486 } \
+ { -march=i586 } \
+ { -march=i686 } \
+ { -march=k6 } ]
+
+set PREFETCH_SSE [list \
+ { -march=i686 -msse } \
+ { -march=pentium4 } ]
+
+set PREFETCH_3DNOW [list \
+ { -march=athlon } \
+ { -march=k6 -m3dnow } ]
+
+if $tracelevel then {
+ strace $tracelevel
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# Initialize harness.
+dg-init
+
+set torture_with_loops $PREFETCH_NONE
+set torture_without_loops $PREFETCH_NONE
+gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/i386-pf-none-*.c]] ""
+
+set torture_with_loops $PREFETCH_SSE
+set torture_without_loops $PREFETCH_SSE
+gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/i386-pf-sse-*.c]] ""
+
+set torture_with_loops $PREFETCH_3DNOW
+set torture_without_loops $PREFETCH_3DNOW
+gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/i386-pf-3dnow-*.c]] ""
+
+dg-finish
--- gcc/testsuite/gcc.misc-tests/i386-pf-3dnow-1.c.orig Fri Nov 30 12:56:57 2001
+++ gcc/testsuite/gcc.misc-tests/i386-pf-3dnow-1.c Fri Nov 30 12:56:47 2001
@@ -0,0 +1,29 @@
+/* Test that the correct data prefetch instructions are generated for i386
+ variants that use 3DNow! prefetch instructions. */
+
+/* { dg-do compile { target i?86-*-* } } */
+
+char *msg = "howdy there";
+
+void foo (char *p)
+{
+ __builtin_prefetch (p, 0, 0);
+ __builtin_prefetch (p, 0, 1);
+ __builtin_prefetch (p, 0, 2);
+ __builtin_prefetch (p, 0, 3);
+ __builtin_prefetch (p, 1, 0);
+ __builtin_prefetch (p, 1, 1);
+ __builtin_prefetch (p, 1, 2);
+ __builtin_prefetch (p, 1, 3);
+}
+
+int main ()
+{
+ foo (msg);
+ exit (0);
+}
+
+/* { dg-final { scan-assembler "prefetch" } } */
+/* { dg-final { scan-assembler "prefetchw" } } */
+/* { dg-final { scan-assembler-not "prefetchnta" } } */
+/* { dg-final { scan-assembler-not "prefetcht" } } */
--- gcc/testsuite/gcc.misc-tests/i386-pf-none-1.c.orig Fri Nov 30 12:57:05 2001
+++ gcc/testsuite/gcc.misc-tests/i386-pf-none-1.c Fri Nov 30 12:56:47 2001
@@ -0,0 +1,26 @@
+/* Test that data prefetch instructions are not generated for i386 variants
+ that do not support those instructions. */
+
+/* { dg-do compile { target i?86-*-* } } */
+
+char *msg = "howdy there";
+
+void foo (char *p)
+{
+ __builtin_prefetch (p, 0, 0);
+ __builtin_prefetch (p, 0, 1);
+ __builtin_prefetch (p, 0, 2);
+ __builtin_prefetch (p, 0, 3);
+ __builtin_prefetch (p, 1, 0);
+ __builtin_prefetch (p, 1, 1);
+ __builtin_prefetch (p, 1, 2);
+ __builtin_prefetch (p, 1, 3);
+}
+
+int main ()
+{
+ foo (msg);
+ exit (0);
+}
+
+/* { dg-final { scan-assembler-not "fetch" } } */
--- gcc/testsuite/gcc.misc-tests/i386-pf-sse-1.c.orig Fri Nov 30 12:57:11 2001
+++ gcc/testsuite/gcc.misc-tests/i386-pf-sse-1.c Fri Nov 30 12:56:47 2001
@@ -0,0 +1,30 @@
+/* Test that the correct data prefetch instructions are generated for i386
+ variants that use SSE prefetch instructions. */
+
+/* { dg-do compile { target i?86-*-* } } */
+
+char *msg = "howdy there";
+
+void foo (char *p)
+{
+ __builtin_prefetch (p, 0, 0);
+ __builtin_prefetch (p, 0, 1);
+ __builtin_prefetch (p, 0, 2);
+ __builtin_prefetch (p, 0, 3);
+ __builtin_prefetch (p, 1, 0);
+ __builtin_prefetch (p, 1, 1);
+ __builtin_prefetch (p, 1, 2);
+ __builtin_prefetch (p, 1, 3);
+}
+
+int main ()
+{
+ foo (msg);
+ exit (0);
+}
+
+/* { dg-final { scan-assembler "prefetchnta" } } */
+/* { dg-final { scan-assembler "prefetcht0" } } */
+/* { dg-final { scan-assembler "prefetcht1" } } */
+/* { dg-final { scan-assembler "prefetcht2" } } */
+/* { dg-final { scan-assembler-not "prefetchw" } } */